News: I moved to the School of Microelectronics, Shandong University.
News: I joined the Department of Electrical and Computer Engineering (ECE) at the Old Dominion University as a tenure-track Assistant Professor in Fall 2017. Multiple Teaching Assistantship (TA)/ Research Assistantship (RA) positions are available for Spring 2018 and Fall 2018.
E-mail: weizeyu@mail.usf.edu
● Research Interests
Hardware/Cyber security; Cryptography; Computer-aided design (CAD); VLSI design; Power management IC; Internet of things (IoT); Machine-learning; Convex optimization; Canonical correlation analysis (CCA); Quantum optimization
●Work Experience
Shandong University, Jinan, China
Professor Sept. 2020-Present
Old Dominion University, Norfolk, VA, USA
Assistant Professor Aug. 2017-Aug. 2020
●Education
Doctor of Philosophy (Ph.D.) in Electrical Engineering
University of South Florida, Tampa, FL, USA, Sept. 2014-Summer 2017
Virginia Polytechnic Institute and State University,
Blacksburg, VA, USA, Jan. 2013-May 2014
Master of Science (M.S.) in Microelectronics
University of Chinese Academy of Sciences, Beijing, P. R. China, Sept. 2009-Jun. 2012
Bachelor of Science (B.S.) in Microelectronics
University of Electronic Science and Technology of China, Chengdu, P. R. China, Sept. 2005-Jun. 2009
● Publications
Journals
[22]. Y. Wen and W. Yu, “Combining thermal maps with Inception neural networks for hardware Trojan detection,” IEEE Embedded Systems Letters, accepted in June 2020.
[21]. W. Yu, “Optimization of Combined Power and Modeling Attacks on VR PUFs with Lagrange Multipliers,” IEEE Transactions on Circuits and Systems II: Express Briefs, accepted in March 2020.
[20]. W. Yu and Y. Wen, “Leveraging Balanced Logic Gates as Strong PUFs for Securing IoT Against Malicious Attacks,” Journal of Electronic Testing: Theory and Applications (Springer), vol. 35, no. 6, pp. 853-865, December 2019.
[19]. Y. Wen and W. Yu, “Boosting the efficacy of power attacks on cryptographic circuits with autoencoder,” IET Electronics Letters, vol. 55, no. 23, pp. 1221-1224, November 2019.
[18]. W. Yu, Y. Wen, and X. Huang, “ResNet-based Trojan detection methodology for protected ICs,” IET Electronics Letters, vol. 55, no. 21, pp. 1116-1118, October 2019.
[17]. W. Yu and Y. Wen, “Efficient hybrid side-channel/machine learning attack on XOR PUFs,” IET Electronics Letters, vol. 55, no. 20, pp. 1080-1082, October 2019.
[16]. Y. Wen and W. Yu, “Machine learning-resistant pseudo-random number generator,” IET Electronics Letters, vol. 55, no. 9, pp. 515-517, May 2019. (feature article)
[15]. W. Yu, “Hardware Trojan attacks on voltage scaling-based side-channel attack countermeasure,” IET Circuits, Devices & Systems, vol. 13, no. 3, pp. 321-326, May 2019.
[14]. W. Yu, “Convolutional neural network attack on cryptographic circuits,” IET Electronics Letters, vol. 55, no. 5, pp. 246-248, March 2019.
[13]. W. Yu, Y. Wen, S. Köse, and J. Chen, “Exploiting Multi-Phase On-Chip Voltage Regulators as Strong PUF Primitives for Securing IoT,” Journal of Electronic Testing: Theory and Applications (Springer), vol. 34, no. 5, pp. 587-598, October 2018.
[12]. W. Yu and J. Chen, “Deep learning-assisted and combined attack: a novel side-channel attack,” IET Electronics Letters, vol. 54, no. 19, pp. 1114-1116, September 2018. (feature article)
[11]. C. Huang, Y. Yang, B. Wu, and W. Yu, “RGB-to-RGBG conversion algorithm with adaptive weighting factors based on edge detection and minimal square error,” Journal of the Optical Society of America (JOSA) A, vol. 35, no. 6, pp. 969-976, June 2018.
[10]. W. Yu and J. Chen, “Masked AES PUF: a new PUF against hybrid SCA/MLAs,” IET Electronics Letters, vol. 54, no. 10, pp. 618-620, May 2018. (feature article)
[9]. W. Yu and S. Köse, “Exploiting Voltage Regulators to Enhance Various Power Attack Countermeasures,” IEEE Transactions on Emerging Topics in Computing, vol. 6, no. 2, pp. 244-257, April-June 2018.
[8]. W. Yu and S. Köse, “False Key-Controlled Aggressive Voltage Scaling: A Countermeasure Against LPA Attacks,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, no. 12, pp. 2149-2153, December 2017.
[7]. W. Yu and S. Köse, “A Lightweight Masked AES Implementation for Securing IoT Against CPA Attacks,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 11, pp. 2934-2944, November 2017.
[6]. W. Yu and S. Köse, “Security-Adaptive Voltage Conversion as a Lightweight Countermeasure Against LPA Attacks,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 7, pp. 2183-2187, July 2017.
[5]. W. Yu and S. Köse, “A Voltage Regulator-Assisted Lightweight AES Implementation Against DPA Attacks,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 8, pp.1152-1163, August 2016.
[4]. W. Yu and S. Köse, “Charge-Withheld Converter-Reshuffling (CoRe): A Countermeasure Against Power Analysis Attacks,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 5, pp. 438-442, May 2016.
[3]. W. Yu and S. Köse, “Security implications of simultaneous dynamic and leakage power analysis attacks on nanoscale cryptographic circuits,” IET Electronics Letters, vol. 52, no. 6, pp. 466-468, March 2016.
[2]. W. Yu and S. Köse, “Time-Delayed Converter-Reshuffling: An Efficient and Secure Power Delivery Architecture,” IEEE Embedded Systems Letters, vol. 7, no. 3, pp. 73-76, September 2015.
[1]. W. Yu, H. Yin, Z. Luo, H. Zhu, Q. Liang, and J. Xu, “Further EOT scaling for MOSFET with asymmetric interfacial oxide layer,” the journal of Microelectronics (Chinese), vol. 1, pp. 92-96, 2014.
Conferences
[12]. Z. Liang, S. Huang, X. Huang, R. Cao, and W. Yu, “Post-Click Behaviors Enhanced Recommendation System,” in Proc. The 2020 Workshop on Data Analytics and User Behavior (DARB), accepted in June 2020.
[11]. Y. Wen, S. F. Ahamed, and W. Yu, “A Novel PUF Architecture Against Non-Invasive Attacks,” in Proc. IEEE/ACM System Level Interconnect Prediction (SLIP) Workshop, June 2019, pp. 1-5.
[10]. Y. Wen and W. Yu, “Convolutional Neural Networks (CNNs)-Assisted Voltage Regulation: A New Power Delivery Scheme,” in Proc. IEEE North Atlantic Test Workshop (NATW), May 2019, pp. 206-211.
[9]. W. Yu and Y. Wen, “Malicious Attacks on Physical Unclonable Function Sensors of Internet of Things ,” in Proc. IEEE North Atlantic Test Workshop (NATW), May 2019, pp. 206-211.
[8]. W. Yu and Y. Wen, “Leakage Power Analysis (LPA) Attack in Breakdown Mode and Countermeasure,” in Proc. IEEE International System-on-Chip Conference (SOCC), September 2018, pp. 102-105.
[7]. W. Yu and S. Köse, “A Lightweight AES Implementation Against Bivariate First-Order DPA Attacks,” ACM Hardware and Architectural Support for Security and Privacy (HASP) Workshop, June 2017, pp. 1-7.
[6]. S. K. Khatamifard, L. Wang, W. Yu, S. Köse, and U. R. Karpuzcu, “ThermoGater: Thermally-Aware On-Chip Voltage Regulation,” in Proc. IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2017, pp. 120-132.
[5]. W. Yu and S. Köse, “Implications of Noise Insertion Mechanisms of Different Countermeasures Against Side-Channel Attacks,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), May 2017, pp. 1-4.
[4]. W. Yu, O. A. Uzun, and S. Köse, “Leveraging On-Chip Voltage Regulators as a Countermeasure Against Side-Channel Attacks,” in Proc. IEEE/ACM Design Automation Conference (DAC), June 2015, pp. 1 - 6.
[3]. M. E. Belviranli, W. Yu, and S. Köse,, “Ultra-Fine Grain Power Management at Datapath-Level: Fact or Fiction,” in Proc. Architectural Support for Programming Languages and Operating Systems (ASPLOS) WACI Session, March 2015.
[2]. W. Jiang, H. Yin, Y. Zhang, Y. Liu, W. Yu, J. Xu, and H. Zhu, “Study of electron mobility on silicon with different crystalline Orientations,” in Proc. IEEE Solid-State and Integrated Circuit Technology (ICSICT), October 2012, pp. 1-3.
[1]. W. Yu, Z. Luo, H. Zhu, Q. Liang, and H. Yin, “Performance optimization of n-MOSFETs using asymmetric interfacial oxide layer,” in Proc. IEEE Solid-State and Integrated Circuit Technology (ICSICT), November 2010, pp. 1901-1903.
Invited Wrokshops
[2]. W. Yu and Y. Wen, “A Novel Strong PUF Architecture Based on On-Chip Voltage Regulation,” IEEE North Atlantic Test Workshop (NATW), May 2018.
[1]. W. Yu and S. Köse, “Lightweight Countermeasures for Securing ICs Against Power Analysis Attacks,” Florida Institute for Cybersecurity Research, March 2017.
U.S. Patents
[6]. S. Köse and W. Yu, “Security-Adaptive Voltage Conversion as a Lightweight Countermeasure Against LPA Attacks,” U.S. Provisional Patent Application, applied April 28, 2017.
[5]. S. Köse and W. Yu, “Charge-withheld converter reshuffling as a countermeasure against DPA attacks,” U.S. Provisional Patent Application, applied April 28, 2017.
[4]. S. Köse and W. Yu, “False Key-Controlled Aggressive Voltage Scaling: A Countermeasure Against LPA Attacks,” U.S. Provisional Patent Application, applied April 28, 2017.
[3]. S. Köse, O. A. Uzun, and W. Yu, “Time Delayed Converter Reshuffling,” U.S. Patent, 9748837, August 29, 2017.
[2]. H. Yin and W. Yu, “Method for manufacturing semiconductor structure,” U.S. Patent 2014/0287565 A1, September 25, 2014.
[1]. H. Yin and W. Yu, “Semiconductor Structure And Method For Manufacturing The Same,” U.S. Patent 2013/0277768 A1, October 24, 2013.
Chinese Patents
[5]. W. Yu and H. Yin, “The Method for manufacturing MOS transistors-part I,” CN102544095A, July 04, 2012.
[4]. W. Yu and H. Yin, “The Method for manufacturing MOS transistors-part II,” CN102569391A, July 11, 2012.
[3]. W. Jiang, W. Yu, Y. Zhang, and H. Yin, “The Method for manufacturing semiconductor device, ” CN102760652A, October 31, 2012.
[2]. H. Yin and W. Yu, “A Novel Method for manufacturing semiconductor structure-part I,” CN103050403A, April 17, 2013.
[1]. H. Yin and W. Yu, “A Novel Method for manufacturing semiconductor structure-part II,” CN103094120A, May 08, 2013.
PhD Students
Yiming Wen (enrolled in Fall 2017)
(B.S. in Central South University, China, M.S. in University of South Florida, USA)
Research area: Deep learning for on-chip voltage regulation and hardware security
Robert A. Floyd (enrolled in Spring 2018)
(B.S. in Norfolk State University, USA, M.S. in Norfolk State University, USA)
Research area: Hardware Trojan design and detection
Sayyed Farid Ahamed (enrolled in Fall 2018)
(B.S. in University of Dhaka, Bangladesh, M.S. in University of Dhaka, Bangladesh)
Research area: FPGA Security and Hardware Accelerator
Master Students
Nhi Huynh; Akash Rao
Undergraduate Students
Hal Ferguson; Alec Chicoine; Vikram Sarkhel; John Bradley; Demetrius Robinson; Chase Vosler; Logan Wright; Anthony Delapena
Teaching
Undergraduate course ECE 241: "Fundamentals of Computer Engineering" at ODU (Fall 2017, Spring 2018, Fall 2018, Spring 2019, Fall 2019, Spring 2020)
Graduate course ECE 695: "Hardware Security and Trust" at ODU (Spring 2019)
Undergraduate/Graduate course ECE 473/573: "Solid State Electronics" at ODU (Fall 2019)
● Professional Activities
Associate Editor
● Elsevier Microelectronics Journal
Conference TPC Member
● IEEE International Symposium on Circuits and Systems (ISCAS) (2018)
● IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (2018, 2019)
● IEEE International System-on-Chip Conference (SOCC) (2018, 2019, 2020)
● IEEE International Symposium on Quality Electronic Design (ISQED) (2019, 2020)
● ACM Great Lakes Symposium on VLSI (GLSVLSI) (2019, 2020)
● ACM/IEEE System Level Interconnect Prediction (SLIP) workshop (2019)
Conference Session Chair
● IEEE North Atlantic Test Workshop (NATW) (2018)
● IEEE/ACM International Conference On Computer Aided Design (ICCAD) (2019)
Finance Chair
● ACM/IEEE System Level Interconnect Prediction (SLIP) workshop (2019)
External Reviewer
● IEEE Transactions on Circuits and Systems I: Regular Papers
● IEEE Transactions on Circuits and Systems II: Express Briefs
● IEEE Transactions on Very Large Scale Integration (VLSI) Systems
● IEEE Transactions on Information Forensics & Security
● IEEE Transactions on Emerging Topics in Computing
● IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
● IEEE Access
● IEEE Internet of Things Journal
● IET Computers & Digital Techniques
● IET Electronics Letters
● Journal of Electronic Testing
● ELSEVIER Microelectronics Journal
● Journal of Circuits, Systems, and Computers
● International Journal of Circuit Theory and Applications
● IEEE International Symposium on Circuits and Systems (ISCAS)
● IEEE International Symposium on Quality Electronic Design (ISQED)
● IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)