Welcome to the IEEE System Validation and Debug Technology Committee's website!

The System Validation and Debug Technology Committee (SVDTC) of IEEE/CEDA brings together passionate experts from Industry and Academia globally, in order to collaboratively address the Industry needs in and around the technology of System validation and Debug (SVD) for silicon-based information and communication systems -- from soup to nuts.

This site is a work in progress. If you have any questions, comments, or offer of help for the website please contact the current SVDTC officers (or the founding SVDTC president Darshan Patra).


  • DAC 2017 Tutorial Presentation and the following Award event
    Posted Aug 28, 2017, 9:19 PM by Priyadarsan Patra
  • 2016 SVDTC Student Award Winners Student Name Submission/Paper University/College Top finish Debjit Pal Automated message selection to enhance observability in trace-based post-silicon validation Univ. of Illinois, UC Runner-up Fatemeh Eslami ...
    Posted Jan 15, 2017, 7:52 AM by Priyadarsan Patra
  • 2016 IEEE SVDTC Student Research Award Call for Submissions for the 2016 SVDTC Student Research Award In the field of System Validation and Debug (organized by IEEE-CEDA SVDTC) SVDTC Overview IEEE System Validation and Debug ...
    Posted Jan 15, 2017, 7:53 AM by Priyadarsan Patra
  • SVDTC in IEEE-CEDA news We appear in the August'2016 news publication by IEEE-CEDA. Check this out: August newsletter
    Posted Aug 13, 2016, 10:12 PM by Priyadarsan Patra
  • Presentations & Minutes One of the purposes of the annual or periodic committee meeting is presenting new research results or technical activities to the committee members and community. Click here to access the ...
    Posted Aug 30, 2016, 11:44 PM by Priyadarsan Patra
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