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Getting Started

The RIFFA 2.0 distribution contains the RIFFA source HDL, the RIFFA driver and software bindings, an installation script, and examples for common FPGA development boards. This website and the distribution should help you get started if you're using one of the FPGA boards we've tested. If you're using a different board, you'll need to adapt the setup instructions accordingly.

There are only really 2 steps to get a basic RIFFA 2.0 design up and running.

Step 1: Install RIFFA on your system
Linux:
Download the RIFFA 2.0 distribution. Build and install the kernel driver and C/C++ library as:
    sudo make setup
    make
    sudo make install

You'll only need to run make setup once, as this simply attempts to install the Linux kernel headers for your version of the Linux kernel. They won't need updating unless you upgrade your system kernel. Running make (or make debug) will build the driver and C/C++ library. Using the make debug directive will output debug messages in the kernel log. This can be very helpful when you're developing your application. After running make install, you'll want to reboot to let the system find your RIFFA 2.0 design on the PCIe bus and let the OS load your driver.

You can install the Java and Python bindings by following the directions for those binding in their respective directories within the RIFFA 2.0 distribution.

Windows:
Download the RIFFA 2.0 distribution. Install the kernel driver and C/C++ library by running the setup.exe or setup_dbg.exe installer (the debug installer outputs additional debug messages to the Windows debug framework). After running the installer, reboot to let the system find your RIFFA 2.0 design on the PCIe bus and let the OS load your driver.

You can install the Java and Python bindings by following the directions for those binding in their respective directories within the RIFFA 2.0 distribution.


Step 2: Create and build a RIFFA design for your FPGA

As described on the architecture page, RIFFA 2.0 relies on a PCIe Endpoint core to drive the transceivers. We have produced step by step guides to build a design:
If you have a development board that is not covered by one of our guides, let us know. We would be happy to test with a PCIe Endpoint core for that board and add it to the list. However, we have decided not to support older FPGAs with legacy interfaces, such as the Xilinx Virtex 5. If you need Virtex 5 support consider using RIFFA 1.0.