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APG-3G



<Output wave example> 3Gbps PCIExpress compliance pattern
APG_3G_3Gbpspattern

For your reference, 
PCK3GF-1 can be useful as a clock source.
LVC-232C is available as a level converter between RS-232C
such as PC serial port and 3.3V CMOS which is a logic level of APG-3G.
Independent 2 outputs are provided, which can be set different patterns. The setting data can be momorized into the Flash. So when the power is on next time, the stored patterns can be output.



SPECIFICATION
Input clock SMB connector 50 ohm single end AC coupling
Sine wave 30MHz~3000MHz -3dBm~3dBm
Square wave 2KHz~3000MHz -3dBm~3dBm
Shutdown/startup time is within 4nS. Duty ratio 50+/-10%
Trigger input SMB connector 3.3V CMOS 
Pulled up internally at 10K ohm
There is a jitter of +/-5nS up to pattern output start relative to trigger input
Pattern output SMB connector Differential PECL 2 channels
Individual channel patterns can be set. 
Skew between channels is within 20ps
Clock output SMB connector Differential PECL
Skew between patterns is within 100ns
Output bit length 1)External trigger mode
Any bit length in a multiple of 32 of 32bit~256Kbits per 1CH
2)continuous mode
Any bit length in a multiple of an even number of 32bit~256Kbits per 1CH
Trigger mode 1)External trigger mode
2)Continuous mode
Frequency counter Frequency is counted by internal standard clock. 
Measurment accuracy is +/-50ppm
Measurement range is from 0.1MHz to 3040.0MHz
LED on board 1)FPGA normal operation display
2)Pattern outputting(also combining with alarm output)
3)Frequency judgment of input RF clock
Control Asynchronous serial communiction 9600bps, 8 bit, 1 stop bit, non-parity
signal level 3.3V CMOS
Power requirements 3.3V single power +/- 0.2V max.1200mA
Outer dimensions 100mmx80mm
Operating Temperature range 0 ~ +60 ° C
Storage temperature range -30 ~ 70 ° C




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apg3g.pdf
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未知的使用者,
2013年11月6日 下午10:19