Gai Liu

Senior R&D Engineer I, Synopsys, Sunnyvale CA





About Me


I’m an R&D Engineer at Synopsys working on logic optimizations in Design Compiler. I got my Ph.D. in the Computer Systems Laboratory at Cornell University working with Prof. Zhiru Zhangdid an internship at IBM T.J. Watson Research Center from August to November in 2014. I have a B.S. in Electrical Engineering and Computer Science from Peking University, and an M.S. in Electrical and Computer Engineering from Cornell University.


My research mainly focuses on improving the quality of high-level synthesis and logic synthesis through algorithmic and architectural innovations. My work (together with my collaborators) has been recognized with two best paper nominations from the International Symposium on Field-Programmable Gate Arrays (2017 and 2018), the premier conference on the FPGA technology.




Selected Publications


1. Gai Liu and Zhiru Zhang. "A Parallelized Iterative Improvement Approach to Area Optimization for LUT-Based Technology Mapping." International Symposium on Field-Programmable Gate Arrays (FPGA'17), February 2017. (Best Paper Nominee)


2. Gai Liu, Mingxing Tan, Steve Dai, Ritchie Zhao, and Zhiru Zhang. "Architecture and Synthesis for Area-Efficient Pipelining of Irregular Loop Nests." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 11, November 2017.


3. Steve Dai, Gai Liu, and Zhiru Zhang. "A Scalable Approach to Exact Resource-Constrained Scheduling Based on a Joint SDC and SAT Formulation." International Symposium on Field-Programmable Gate Arrays (FPGA'18), February 2018. (Best Paper Nominee)


4. Gai Liu and Zhiru Zhang. "Statistically Certified Approximate Logic Synthesis." International Conference on Computer-Aided Design (ICCAD'17), November 2017.




List of Publications


Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawai, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald Dreslinski, Christopher Batten, and Michael B. Taylor. "The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips." IEEE Micro, March/April 2018.

Steve Dai, Gai Liu, and Zhiru Zhang. "A Scalable Approach to Exact Resource-Constrained Scheduling Based on a Joint SDC and SAT Formulation." International Symposium on Field-Programmable Gate Arrays (FPGA'18), February 2018. (Best Paper Nominee)

Yuan Zhou, Udit Gupta, Steve Dai, Ritchie Zhao, Nitish Srivastava, Hanchen Jin, Joseph Featherston, Yi-Hsiang Lai, Gai Liu, Gustavo Angarita Velasquez, Wenping Wang, and Z. Zhang. "Rosetta: A Realistic High-Level Synthesis Benchmark Suite for Software Programmable FPGAs." International Symposium on Field-Programmable Gate Arrays (FPGA'18), February 2018.

Gai Liu and Zhiru Zhang. "Statistically Certified Approximate Logic Synthesis." International Conference on Computer-Aided Design (ICCAD'17), November 2017.


Gai Liu, Mingxing Tan, Steve Dai, Ritchie Zhao, and Zhiru Zhang. "Architecture and Synthesis for Area-Efficient Pipelining of Irregular Loop Nests." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 11, November 2017.


Steve Dai, Gai Liu, Ritchie Zhao, and Zhiru Zhang. "Enabling Adaptive Loop Pipelining in High-Level Synthesis." 52nd Annual Asilomar Conference on Signals, Systems, and Computers, October 2017. (Invited Paper)


Tutu Ajayi, Khalid Al-Hawaj, Aporva Amarnath, Steve Dai, Scott Davidson, Paul Gao, Gai Liu, Atieh Lotfi, Julian Puscar, Anuj Rao, Austin Rovinski, Loai Salem, Ningxiao Sun, Christopher Torng, Luis Vega, Bandhav Veluri, Xiaoyang Wang, Shaolin Xie, Chun Zhao, Ritchie Zhao, Christopher Batten, Ronald G. Dreslinski, Ian Galton, Rajesh K. Gupta, Patrick P. Mercier, Mani Srivastava, Michael B. Taylor, and Zhiru Zhang. "Celerity: An Open-Source RISC-V Tiered Accelerator Fabric." ACM/IEEE Symposium on High-Performance Chips (HOTCHIPS'17), August 2017.


Gai Liu and Zhiru Zhang. "A Parallelized Iterative Improvement Approach to Area Optimization for LUT-Based Technology Mapping." International Symposium on Field-Programmable Gate Arrays (FPGA'17), February 2017. (Best Paper NomineeDownload optimized designs


Chang Xu, Gai Liu, Ritchie Zhao, Stephen Yang, Guojie Luo, and Zhiru Zhang. "A Parallel Bandit-Based Approach for Autotuning FPGA Compilation." International Symposium on Field-Programmable Gate Arrays (FPGA'17), February 2017.


Steve Dai, Ritchie Zhao, Gai Liu, Shreesha Srinath, Udit Gupta, Christopher Batten, and Zhiru Zhang. "Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis." International Symposium on Field-Programmable Gate Arrays (FPGA'17), February 2017.


Ritchie Zhao, Gai Liu, Shreesha Srinath, Christopher Batten, and Zhiru Zhang. "Improving High-Level Synthesis with Decoupled Data Structure Optimization." Design Automation Conference (DAC'16), June 2016.


Mingxing Tan, Gai Liu, Ritchie Zhao, Steve Dai, and Zhiru Zhang. "ElasticFlow: A Complexity-Effective Approach for Pipelining Irregular Loop Nests." International Conference on Computer-Aided Design (ICCAD'15), November 2015.


Gai Liu and Zhiru Zhang. "A Reconfigurable Analog Substrate for Highly Efficient Maximum Flow Computation.Design Automation Conference (DAC'15), June 2015.


Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang, and Christopher Batten. "Architectural Specialization for Inter-Iteration Loop Dependence Patterns." International Symposium on Microarchitecture (MICRO'14), December 2014.


Gai Liu, Ye Tao, Mingxing Tan, and Zhiru Zhang. "CASA: Correlation-Aware Speculative Adders." International Symposium on Low Power Electronics and Design (ISLPED'14), August 2014.


Gai Liu, Gang Du, Tiao Lu, Xiaoyan Liu, Pingwen Zhang, and Xing Zhang. "Simulation Study of Quasi-ballistic Transport in Asymmetric DG-MOSFET by Directly Solving Boltzmann Transport Equation." IEEE Transactions on Nanotechnology, vol 12, no. 2, March 2013.


 

 

Other Research Activities


Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang, and Christopher Batten. "XLOOPS: Explicit Loop Specialization." International Workshop on Heterogeneous Computing Platforms (HCP'14), November 2014.


Gai Liu, Gang Du, Tiao Lu, Xiaoyan Liu, Pingwen Zhang, and Xing Zhang. "Evaluation of scattering in asymmetric quasi-ballistic DG-MOSFET." Silicon Nanoelectronics Workshop (SNW'12), June 2012.




Honors and Awards


Best Paper Award Nomination, International Symposium on Field-Programmable Gate Arrays (February 2018)

Best Paper Award Nomination, International Symposium on Field-Programmable Gate Arrays (February 2017)

A. Richard Newton Young Student Fellowship (June 2014)

Jacobs Scholar Fellowship, Cornell University (August 2013)

New Oriental Scholarship, Peking University (February 2012)

CASIC Scholarship, Peking University (October 2011)

May Fourth Scholarship, Peking University (October 2010)




Links


Zhang Research Group

http://zhang.ece.cornell.edu/


Math ∩ Programming by Jeremy Kun

http://jeremykun.com/


Big ideas in Computer Science and Engineering by André DeHon

http://www.seas.upenn.edu/~andre/general/computer_science.html


A simple (incomplete) checklist for writing papers by Sachin Sapatnekar

http://www.ece.umn.edu/~sachin/misc/writing.html


Major Conferences on Electronic Design Automation (EDA) and Computer-Aided Design (CAD)

http://www.yzuda.org/Useful_Links/conferences/EDA/




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