Tel: +886-3-5712121 ext. 58524
Office: EF369
Address: Institute of Electronics National Yang Ming Chiao Tung University1001, University Rd.Hsinchu 300
Taiwan
AI-EDA Lab
(工程六館455)
(工程六館455)
徵求
博士生 (前瞻所、智能所、電子所)、
碩士生 (前瞻所、智能所、電子所)、
專題生
博士生 (前瞻所、智能所、電子所)、
碩士生 (前瞻所、智能所、電子所)、
專題生
Q: 實驗室研究方向是什麼？
A: Electronic design automation (EDA), AI for EDA, AI/LLM for chip/PCB design, Physical design automation, Analog design automation, 3D IC design automation, PCB design automation, Document analysis and recognition, ...
Q: 實驗室有企業合作和實習機會嗎？
A: 實驗室與多家國內外企業建立了緊密的合作關係，深度融合了產業需求和學術研究的合作模式。每一家企業都帶來了獨特的挑戰和機遇，讓實驗室的研究更加豐富多樣，這些合作為同學們提供了豐厚的研究津貼豐厚的研究津貼。除了研究津貼，部分企業亦提供實習機會，讓同學們走出實驗室，深入到實際的工作環境中，與業界專業人士共同合作，解決現實世界中的問題。
Q: 實驗室有出國研究和實習機會嗎？
A: 實驗室同學主要來自「產學創新研究學院」，產創學院提供豐富的國際合作機會與資源，邀請多位國際知名院士、國外頂尖大學教授共同合作指導學生，並提供豐厚的出國短期研究津貼，讓同學們有機會與世界頂尖學府的學者進行合作研究。老師會推薦有潛力的同學前往歐美日頂尖學府進行合作研究，與不同文化背景的學者、研究生進行深度的交流與合作，提升實驗室同學研究能力並拓展國際視野。
Q: 有機會出國參加頂尖國際會議嗎？
A: 實驗室截至2024已發表 EDA 領域頂尖國際會議論文 DAC 11篇、ICCAD 9篇，重要國際會議論文 DATE、ISPD、ASP-DAC、MLCAD 共13篇，老師非常鼓勵同學們將研究成果發表至國際會議進行口頭報告，並給予全額差旅費補助。
Q: 加入實驗室需要哪些先備知識？
A: C/C++/Python programming skills, Data structures and algorithms, Logic design, VLSI design, ...
Q: 如果沒有這些先備知識仍然可以加入實驗室嗎？
A: 實驗室十分歡迎有熱忱的新手加入。即便一開始缺乏一些必要的基礎知識，只要有強烈的學習意願和不懼挑戰的精神，在老師及學長姐的引導下，仍可很快掌握相關知識進行研究工作。
Q: 老師指導學生的方式？
A: 開放自由，讓同學們自動自發自我管理。除了每週固定的 group meeting，以及與合作單位的定期會議，老師隨時開放同學們約時間討論研究方向、研究進度、研究方法、及論文撰寫。
Q: 畢業後的出路好嗎？
A: 畢業後的出路相當廣闊且有前景。隨著半導體產業蓬勃發展，對於 EDA 和 AI 人才的需求與日俱增，實驗室畢業生不僅有機會加入國際知名 EDA 公司，亦是晶片設計和半導體製造公司網羅的對象。此外，紮實的研究訓練亦有助於其它領域的軟硬體設計工作。
Q: 如何加入實驗室？
A: 實驗室招收的研究生主要來自「前瞻半導體研究所、智能系統研究所、電子研究所」，請同學們於收到錄取通知後與老師聯繫。
Recruitment
Prof. Mark Po-Hung Lin's lab is recruiting highly motivated Ph.D./M.S. students and/or full-time research assistants (Ph.D./M.S./B.S.), who are interested in solving challenging electronic design automation (EDA) problems and pursuing research excellence in AI and EDA fields. Competitive compensation will be offered for qualified candidates.
Please contact Prof. Lin by email while sending him your resume, bio, transcripts, and other supporting materials.
Biography
Mark Po-Hung Lin received the B.S. and M.S. degrees in the Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University (NCTU), which was merged into National Yang Ming Chiao Tung University (NYCU). He received the Ph.D. degree in the Graduate Institute of Electronics Engineering, National Taiwan University (NTU). He is currently a professor with the Industry-Academia Inovation School, Institute of Electronics, and College of Artificial Intelligence, NYCU.
Before joining NYCU, he was a faculty member with the Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan, during 2009–2019. He was also a Visiting Research Scholar with the University of Illinois at Urbana-Champaign, Champaign, IL, USA, during 2007–2009, a Humboldt Research Fellow with the Technical University of Munich (TUM), Germany, during 2013–2015, and a JSPS Invitation Fellow with Osaka University, Japan, in 2016.
Prior to the academic career, Dr. Lin was with SpringSoft, Inc., during 2000–2007 (acquired by Synopsys, Inc., in 2012), where he received the 2006 Best SpringSoft R&D Team Award as a manager and team leader. He co-initiated the "Laker Analog Prototyping" product with 5 patented technologies.
Dr. Lin's research interests lie in the field of electronic design automation (EDA), particularly in design automation for analog/mixed-signal/RF integrated circuits and emerging high-performance energy-efficient circuits and systems. He was recipients of several pretigious awards, including three 1st Place Awards in IEEE/ACM ICCAD CAD Contests, Humboldt Research Fellowship for Experienced Researchers, JSPS Invitation Fellowship for Research in Japan, etc. He has been serving in the technical program committees of premier EDA conferences, including DAC, ICCAD, DATE, ASP-DAC, and ISPD, and co-organizing 2018–2020 IEEE/ACM ICCAD CAD Contests and other international seasonal schools/workshops.
Selected Honors & Awards
2020 JSPS Invitation Fellowship for Research in Japan, Japan Society for the Promotion of Science
2019 Academia Sinica Research Award for Junior Investigators (2019 中央研究院年輕學者研究著作獎)
Best Paper Award Nominee in DATE 2019 (834 submissions, 202 accepted papers, 21 BPA nominations)
107學年度 科技部 優秀年輕學者研究計畫
The 1st Place Award in 2017 IEEE/ACM ICCAD CAD Contest (Problem A: Resource-aware Patch Generation)
The 1st Place Award in 2017 IEEE/ACM ICCAD CAD Contest (Problem B: Net Open Location Finder with Obstacles)
106學年度 臺灣綜合大學系統 年輕學者創新研究選拔 優等獎
2017 IEEE Tainan Section Himax Award
The 1st Place Award in 2016 IEEE/ACM ICCAD CAD Contest (Problem A: Identical Fault Search)
2015 JSPS Invitation Fellowship for Research in Japan, Japan Society for the Promotion of Science
104學年度 科技部 優秀年輕學者研究計畫
2015 Carl Friedrich von Siemens Fellowship Supplement, Carl Friedrich von Siemens Foundation
2014 IEEE Tainan Section Best GOLD Member Award
103學年度 臺灣綜合大學系統 年輕學者創新研究選拔 優等獎
103 學年度 中國電機工程學會 優秀青年電機工程師獎
103學年度 臺灣積體電路設計學會 傑出年輕學者獎
2013 IEEE Tainan Section Macronix Award
2013 Humboldt Research Fellowship for Experienced Researchers, Alexander von Humboldt (AvH) Foundation
101學年度 國立中正大學 青年學者獎
Selected Academic Services
Chair
IEEE CEDA Taipei Chapter, 2022-2023
ACM SIGDA Taiwan Chapter, 2017-2018
2018–2020 IEEE/ACM CAD Contest at ICCAD
2018 IEEE/ACM International Seasonal School on Physical Design Automation
TPC track chair/co-chair
IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
IEEE/ACM Design, Automation & Test in Europe (DATE)
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC)
TPC member
ACM/IEEE Design Automation Conference (DAC)
IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
IEEE/ACM Design, Automation & Test in Europe (DATE)
IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC)
ACM International Symposium on Physical Design (ISPD)
International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
Keynote Speaker
2023 IEEE Latin American Symposium on Circuits and Systems (LASCAS)
Invited talks/lectures
Brazil: UFRGS
China: Tsinghua Univ., Peking Univ., Fuzhou Univ., ...
Germany: KIT, TUM, ...
Japan: Kyoto Univ., Osaka Univ., Tokyo Tech., ...
Saudi Arabia: KAUST
Taiwan: NCTU, NCKU, NCNU, NTHU, NTU, THU, YZU, ...
USA: IBM T.J. Wason, ...
Selected Publications
Journal & Conference Papers (dblp)
Book Chapters
R. A. Rutenbar, J. M. Cohn, M. P.-H. Lin, and F. Baskaya, "Layout tools for analog integrated circuits and mixed-signal system-on-chip: A survey," EDA for IC Implementation, Circuit Design, and Process Technology (Electronic Design Automation for Integrated Circuits Handbook), CRC Press, 2nd Ed., pp. 479--499, April 2016.
M. P.-H. Lin and Y.-W. Chang, "Hierarchical placement with layout constraint," Analog Layout Synthesis: A Survey of Topological Approaches (Helmut E. Graeb, Editor), Springer, pp. 61--94, October 2010.
US Patents
P.-H. Lin, V. W. Hsiao, C.-Y. Lin, N.-C. Chen, Y.-T. Hsieh, "Method for parasitic-aware capacitor sizing and layout generation," U.S. Patent No. 10,635,771, April 28, 2020.
T.-C. Chen, P.-H. Wu, P.-H. Lin, and T.-Y. Ho, "Knowledge-based analog layout generator," U.S. Patent No. 9,256,706, February 9 2016.
P.-H. Lin, Y.-Y. He, and W.-H. Hsiao, "Method of common-centroid IC layout generation," U.S. Patent No. 8,751,995, June 10, 2014.
P.-H. Lin, "Analog IC placement using symmetry-islands," U.S. Patent No. 7,877,718, January 25, 2011.
P.-H. Lin, W.-C. Chao, and S.-C. Lin, "Hierarchical analog IC placement subject to symmetry, matching, and proximity constraints," U.S. Patent No. 7,873,928, January 18, 2011.
P.-H. Lin, H.-C. Yu, T.-H. Tsai, S.-C. Lin, and S.-H. Bai, "Analog and mixed-signal IC layout system,'' U.S. Patent No. 7,739,646, June 15, 2010.
T.-H. Tsai, P.-H. Lin, S.-C. Lin, and H.-C. Yu, "Rule-based schematic diagram generator," U.S. Patent No. 7,386,823, June 10, 2008.
P.-H. Lin and S.-C. Lin, "Schematic diagram generation and display system," U.S. Patent No. 7,178,123, February 13, 2007.