I am a tech lead manager with 15+ years of experience in research, development, and technical leadership of machine learning based systems. I am currently leading the quality efforts in Vertex Generative Question Answering, Google Cloud's Generative AI solution for enterprise customers to answer questions based on their own data.

I previously worked in the EDA field, where the algorithms and tools I developed are being used by numerous companies worldwide in design, manufacture and test of integrated circuits. I have 20+ publications, 20+ patents, and received multiple top awards. 

Education

• PhD, Electrical and Computer Engineering, Carnegie Mellon University, 2012

• MS, Computer Science, Tsinghua University, 2008

• BS, Computer Science, Tsinghua University, 2006

Awards

• Master Level Invention Milestone Award, Cadence Design Systems, 2020

• Outstanding PhD Dissertation Award, ACM Special Interest Group on Design Automation, 2014.

• A.G. Milnes Award for Best PhD Thesis, ECE Department, Carnegie Mellon University, 2013.

• Donald O. Pederson Best Paper Award, IEEE Transactions on CAD, 2013. 

• Best Paper Award, Design Automation Conference, 2010.

Publications

• 1. Haiguang Liao, Qingyi Dong, Xuliang Dong, Wentai Zhang, Wangyang Zhang, Weiyi Qi, Elias Fallon, Levent Burak Kara, "Attention Routing: track-assignment detailed routing using attention-based reinforcement learning", arXiv preprint arXiv:2004.09473, 2020. 

  2. Jun Tao, Fa Wang, Paolo Cachecho, Wangyang Zhang, Shupeng Sun, Xin Li, Rouwaida Kanj, Chenjie Gu and Xuan Zeng, "Large-Scale Circuit Performance Modeling by Bayesian Model Fusion," Machine Learning in VLSI Computer-Aided Design, pp. 403-422, Springer, 2019. 

  3. Jun Tao, Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob A Rutenbar, Ronald D Blanton and Xuan Zeng, "Efficient Process Variation Characterization by Virtual Probe," Machine Learning in VLSI Computer-Aided Design, pp. 201-231, Springer, 2019. 

  4. Fa Wang, Paolo Cachecho, Wangyang Zhang, Shupeng Sun, Xin Li, Rouwaida Kanj and Chenjie Gu, "Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 35, no. 8, pp. 1255-1268, Aug. 2016.

  5. Chun-Kai Hsu, Fan Lin, Kwang-Ting Cheng, Wangyang Zhang, Xin Li, John M. Carulli Jr. and Kenneth M. Butler, "Test Data Analytics — Exploring Spatial and Test-Item Correlations in Production Test Data," International Test Conference (ITC), 2013.

  6. Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane Boning, Sharad Saxena, Andrzej Strojwas and Rob Rutenbar, "Efficient spatial pattern analysis for variation decomposition via robust sparse regression," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 32, no. 7, pp. 1072-1085, 2013.

  7. Wangyang Zhang, Xin Li, Sharad Saxena, Andrzej Strojwas and Rob Rutenbar, "Automatic clustering of wafer spatial signatures," Design Automation Conference (DAC), 2013.

  8. Fa Wang, Wangyang Zhang, Shupeng Sun, Xin Li and Chenjie Gu, "Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data," Design Automation Conference (DAC), 2013.

  9. Wangyang Zhang, IC Spatial Variation Modeling: Algorithms and Applications, PhD Dissertation, Carnegie Mellon University, 2012.

  10. Wangyang Zhang, Amith Singhee, Jinjun Xiong, Peter Habitz, Amol Joshi, Chandu Visweswariah and James Sundquist, "A dynamic method for efficient random mismatch characterization of standard cells," International Conference on Computer Aided Design (ICCAD), pp. 180-186, 2012.

  11. Xin Li, Wangyang Zhang, Fa Wang, Shupeng Sun and Chenjie Gu, "Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion," International Conference on Computer Aided Design (ICCAD), pp. 627-634, 2012.

  12. Xin Li, Wangyang Zhang and Fa Wang, "Large-scale statistical performance modeling of analog and mixed-signal circuits," IEEE Custom Integrated Circuits Conference (CICC), pp. 1-8, 2012.

  13. Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane Boning, Emrah Acar, Frank Liu and Rob Rutenbar, "Spatial variation decomposition via sparse regression," International Conference on IC Design and Technology (ICICDT), pp. 1-4, 2012.

  14. Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob Rutenbar and Ronald Blanton, "Virtual probe: a statistical framework for low-cost silicon characterization of nanoscale integrated circuits," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 30, no. 12, pp. 1814-1827, Dec. 2011. (Best paper award)

  15. Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane Boning, and Rob Rutenbar, "Toward efficient spatial variation decomposition via sparse regression," International Conference on Computer Aided Design (ICCAD), pp. 162-169, 2011.

  16. Hsiu-Ming (Sherman) Chang, Kwang-Ting (Tim) Cheng, Wangyang Zhang, Xin Li and Kenneth Butler, "Test cost reduction through performance prediction using virtual probe," International Test Conference (ITC), 2011.

  17. Wenjian Yu, Chao Hu and Wangyang Zhang, "Parallel statistical capacitance extraction of on-Chip interconnects with an improved geometric variation model," Asia and South Pacific Design Automation Conference (ASPDAC), pp. 67-72, 2011.

  18. Wangyang Zhang, Xin Li, Emrah Acar, Frank Liu and Rob Rutenbar, "Multi-wafer virtual probe: minimum-cost variation characterization by exploring wafer-to-wafer correlation," International Conference on Computer Aided Design (ICCAD), pp. 47-54, 2010.

  19. Wangyang Zhang, Xin Li and Rob Rutenbar, "Bayesian virtual probe: minimizing variation characterization cost for nanoscale IC technologies via Bayesian inference," Design Automation Conference (DAC), pp. 262-267, 2010. (Best paper award)

  20. Wangyang Zhang, Tsung-Hao Chen, Ming-Yuan Ting and Xin Li, "Toward efficient large scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression," Design Automation Conference (DAC), pp. 897-902, 2010.

  21. Wenjian Yu, Chao Hu and Wangyang Zhang, "Variational capacitance extraction of on-chip interconnects based on continuous surface model," Design Automation Conference (DAC), pp. 758-763, 2009.

  22. Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang and Jinjun Xiong, " An efficient method for chip-level statistical capacitance extraction considering process variations with spatial correlation," Design, Automation & Test in Europe (DATE), pp. 580-585, 2008.

  23. Wangyang Zhang, Wenjian Yu, Hong Liu, Zeyi Wang, "Hierarchical h-adaptive computation of VLSI interconnect capacitance with QMM acceleration," International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp. 1438-1440, 2006.

 Issued Patents

1. Wangyang Zhang, Hongzhou Liu,  Hua Luo,  Elias Fallon, System and method for device mismatch contribution computation for non-continuous circuit outputs, US Patent 11,562,110

2. Wangyang Zhang, Elias Fallon, System, method, and computer program product for analog structure prediction associated with an electronic design, US Patent 11,544,574

3. Wangyang Zhang, Elias Fallon, Regis Colwell, Hua Luo, Namita Rane. System, method, and computer program product for group and isolation prediction using machine learning and applications in analog placement and sizing, US Patent 11275882

4. Elias Fallon, Wangyang Zhang, Qian Sheng, System, method and computer program product for automatic generation of sizing constraints by reusing existing electronic designs, US Patent 11048852

5. Saleha Khatun, Qian Sheng, Wangyang Zhang, Elias Fallon, System, method, and computer program product for optimization in an electronic design, US Patent 11,003,825

6. Wangyang Zhang, Hua Luo, Regis Colwell, Qian Xu, System, method, and computer program product for simultaneous routing and placement in an electronic circuit design, US Patent 10,949,596

7. Wangyang Zhang, Hongzhou Liu, Richard J O'Donovan, Michael Tian, Sampling selection for enhanced high yield estimation in circuit designs, US patent 10,909,293

8. Wangyang Zhang, Hongzhou Liu, Richard J O'Donovan, Michael Tian, Sampling selection for enhanced high yield estimation in circuit designs, US patent 10,853,550

9. Hongzhou Liu, Wangyang Zhang, Parallel Monte Carlo sampling for predicting tail performance of integrated circuits, US patent 10,776,548

10. Hua Luo, Regis Colwell, Wangyang Zhang, System, method, and computer program product for genetic routing in an electronic circuit design, US patent 10,747,936

11. Wangyang Zhang, Regis Colwell, Hua Luo, Namita Rane, Elias Fallon, Method and system for performing cross-validation for model-based layout recommendations, US patent 10,699,051 

12. Regis Colwell, Wangyang Zhang, Elias Fallon, David White, Jose Martinez, Rongchang Yan, Method and system for automatically extracting layout design patterns for custom layout design reuse through interactive recommendations, US patent 10,628,546 

13. Wangyang Zhang and Hongzhou Liu, Estimation and visualization of a full probability distribution for circuit performance obtained with Monte Carlo simulations over scaled sigma sampling, US patent 10,528,644

14. Wangyang Zhang and Hongzhou Liu, Failure boundary classification and corner creation for scaled-sigma sampling, US patent 10,325,056

15. Hongzhou Liu and Wangyang Zhang, Parallel extraction of worst case corners, US patent 10,289,764 

16. Wangyang Zhang, Shikha Sharma and Hongzhou Liu, Yield estimation for a post-layout circuit design, US patent 10, 275,555

17. Wangyang Zhang, Hongzhou Liu and Catherine Bunting, Interactive platform to predict mismatch variation and contribution when adjusting component parameters, US patent 10,262,092 

18. Wangyang Zhang and Hongzhou Liu, Efficient extraction of the worst sample in Monte Carlo simulation, US patent 9,836,564

19. Hongzhou Liu, Stephan Weber and Wangyang Zhang, Efficient extraction of K-sigma corners from Monte Carlo simulation, US patent 9,805,158

20. Peter Habitz, Amol Joshi, Amith Singhee, James Sundquist and Wangyang Zhang, Dynamically determining number of simulations required for characterizing intra-circuit incongruent variations, US patent 9,323,875

21. Hongzhou Liu and Wangyang Zhang, Computing device mismatch variation contributions, US patent 8,813,009

22. Hongzhou Liu and Wangyang Zhang, Device mismatch contribution computation with nonlinear effects, US patent 8,954,910

23. Hongzhou Liu and Wangyang Zhang, Efficient monte carlo flow via failure probability modeling, US patent 9,524,365