This component simulates generic I2C serial EEPROMs in the 24xxx series (e.g. 24C08, 24C512, etc). They are produced by several companies including Atmel and Microchip, and they may differ slightly between manufacturers with respect to how the A0, A1, and A2 pins are used. This component is licensed under
the GNU LGPL v2.1. This component makes use of the ShineInHex control which was developed by The MASM Forum member "ramguru". The original binaries, source code, and documentation for the control can be found in this thread on the same forum. The example program was written by CC Dharmani, and the full C source code is available on his Design with Microcontrollers blog. DownloadsNote that the "eeprom24-1.0.zip" file also contains a "ShineInHex.dll" file (the same one used by the AVR Peripherals) which should be added to VMLAB's "bin" directory.
Usage; To use this component, use the following component definition:; ; X[<Name>] _eeprom24 <MemorySize> <PageSize> <Delay> <Address> <Mask> ; + <SDA> <SCL> ; ; The <SDA> and <SCL> pins are respectively the serial data and serial clock ; used by the I2C bus. The <MemorySize> parameter specifies the total EEPROM ; size in bytes, and the <PageSize> parameter specifies the maximum number of ; bytes that can be written to the EEPROM with a single I2C write command. ; Both <MemorySize> and <PageSize> must both be given as "log base 2" of the ; actual byte size. For example a <MemorySize> of "12" would actually specify ; 4096 bytes since 2 to the power of 12 equals 4096. ; ; After data is written to memory, the EEPROM will go into a busy state for ; the duration of time given by the <Delay> parameter. During this busy time, ; the EEPROM does not respond to any commands on the I2C bus. A <Delay> value ; of 0 results in no busy time; in other words, after a memory write operation, ; the EEPROM will be immediately ready to accept another command. ; ; The <Address> parameter specifies the 7-bit I2C slave address to which the ; EEPROM responds. The <Mask> parameter is a bitmask indicating which bits in ; <Address> are actually significant when performing the address comparison; ; a 0 bit in <Mask> means that the corresponding bit in <Address> is a "don't ; care". ; ; If the optional instance <Name> is specified, then the EEPROM will preserve ; its memory contents across simulation runs by using an Intel HEX format ; file "<Name>.eep". Example; Simulate Atmel 24C64 EEPROM; 8KB memory; 32B page size; 10ms write time; 1010000 slave address Xdata1 _eeprom24(13 5 0.01 80 127) pd1 pd0 ; Simulate Microchip 24AA02 EEPROM ; 256B memory; 8B page size; 5ms write time; 1010xxx slave address Xdata2 _eeprom24(8 3 0.005 80 120) pd1 pd0 ; Simulate Ramtron FM24C254 (Ferroelectric Nonvolatile RAM) ; 32KB memory; no page buffer; zero write delay; 1010000 slave address Xdata3 _eeprom24(15 15 0 80 127) pd1 pd0 Version History
Future Improvement Ideas
ScreenshotBelow is a screenshot of VMLAB's Control Panel window showing an instance of the "eeprom24" component:
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