Siddarth Suresh
1111 SW 16th Avenue, APT 23, Gainesville, Florida-32601
Mobile:
352-870-9092 • sidd2783@gmail.com
http://www.hcs.ufl.edu/~suresh/
Education
Master of Science, Electrical and Computer Engineering, University of Florida, Gainesville,
August 2006-Present
GPA: 3.41/4 (18/30 credit hours)
Graduate Coursework:
· VLSI circuits
· Advanced VLSI design
· Computer Architecture
· Bipolar Analog IC design
· MOS Analog IC design.
Academic Projects:
· Design of a Mixed Mode Phase Locked Loop.
· Design of a Dual Supply 4-bit Carry Propagate Adder.
· Design of a low cost, low power & fast 6*6 bit CMOS SRAM.
· Design of a Fifth Order Chebychev Low Pass filter.
· Design of a 3-bit DAC.
· “Effective branch prediction using future bits”, implementation of a branch prediction technique using history and future bits
Bachelor of Technology, Electronics and Communication, Vellore Institute of Technology, TamilNadu, India
August 2001 - May 2005
CGPA: 9.26/10
Project :
Enhancements for the FLOSWITCH.
Company : National Aerospace Laboratories, Bangalore, India.
Summary : Re-design and Incorporation of
optimized data transfer algorithms in FLOSWITCH®, a data
transfer hub used in India’s Latest parallel computer FLOSOLVER Mk6 for faster transfer of
data between their Processing Elements, and a floating point unit to combine the results of the
processing elements all using VHDL . The redesigned FLOSWITCH® achieved four-fold
increase in performance from its previous versions.
Work Experience
Research Assistant, the Centre for High- Performance Reconfigurable Computing (CHREC), Present
Project : “Device Architectures and Tradeoffs”, with focus on FPLD architectures and kernel
development for FPOAs (Field Programmable Object Arrays)
Design Engineer (Trainee), Encompass Electronics Private Limited, Bangalore, India, August 2005 - July 2006
Project : Development of a full digital closed loop drive controller board for use with steel rolling mill class
large DC motors.
Summary : C-code development and compilation of 8051 micro controller (C8051-F-020) section on the
board for interface, for user display and field programming of loop parameters. C-code
development and compilation of C8051-F-120 section of the board for PI loop computations
and interface with ADC and ASIC on board. Software interface front end configured with
Visual Basic and board re-design after testing.
Project : Camera Control with C8051- F- 020
Summary :C-code development and compilation of 8051 micro controller (C8051-F-020) section on the
board for Camera Control.Software interface front end configured with Visual Basic.
(a).Complete code development for GUI interface. (b).Serial port interface to control board.
Internship
· Completed training in Verilog HDL front end Design flow and Verilog hardware modeling, and modeled a
period counter using Verilog HDL, Encompass Electronics Private Limited, Bangalore, India , May 2003
· Underwent training in Mobile Switching Centre, Bharath Sanchar Nigam Limited, Salem, India , May 2004
Technical Skills
Excellence - C, C++, VB6, Verilog HDL, VHDL
Experience - Xilinx ISE, Aldec HDL,
21xxADSP, Microprocessors (8085, 8086) and Microcontrollers
(C8051F020, C8051F120), 21xx ADSP, Cygnal IDE, KEIL, Simplescalar, Cadence, UNIX
Exposure - MATLAB, PSPICE
Areas Of Interest
· VLSI Systems Design
· Embedded Systems
· Computer Architecture