Raj Parihar

Welcome to my Abode!

About me

At present, I am a 3rd year Ph.D. student in the Department of Electrical and Computer Engineering at University of Rochester, Rochester, NY - 14627.

I am a member of Advanced Computer Architecture Lab (ACAL) and my adviser is Prof. Michael Huang.

Research Interests

Multiprocessor architecture and cache coherence
Energy efficient fault tolerant micro-architecture
Low power high-speed VLSI design
Software-hardware cooperative architecture
Parallel programming and compiler optimizations

* For more details please refer my CV.

Current Projects

Inductive noise mitigation in high performance microprocessor
Selective cache-coherence for large scale multiprocessors
Transceiver module design for optical interconnects in 3-D chip

Industry Experience

Feb' 08 - July' 08 : Cypress Semiconductors India

Technical Marketing Er, Data Communication Division (DCD)

June' 06 - Jan' 08 : Microchip Technology India

Applications Er, Advance Microcontroller Architecture Division

July' 05 - Dec' 05 : Microsoft Research India

Research Intern, Trends in Emerging Market (TEM) Group

May' 04 - July' 04: Central Electronics Eng. Research Institute, Pilani

Summer Intern, VLSI Design Group

Undergraduate Study

I did my undergraduate study from Birla Institute of Technology & Science - Pilani, INDIA. I graduated in 2006 with a bachelor degree in Electrical and Electronics Engineering (EEE).

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What's new?

Nothing at the moment!

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Mailing Address:

212, Conant Rd, Apt C

Rochester, NY - 14623

Email:

parihar[@]ece[.]rochester[.]edu

parihar[@]cs[.]rochester[.]edu

(*remove the [ ] from emails)

Phone:

+001 (585) 752 - 1706

Subpages (3): Fall - 2008 Spring - 2009 Winter 2008

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