publications - paolofaraboschi

Selected Publications

Books

J. Fisher, P. Faraboschi, C. Young. Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools. Morgan-Kaufmann (Elsevier). ISBN: 1-55860-766-8. Jan 2005. Book website is at http://www.vliw.org

Journals and Edited Books

J. Fisher, P. Faraboschi, C.Young. "VLIW Processors". Entry in "Encyclopedia of Parallel Computing". D. Padua (Ed.) 1st Edition., 2011, Springer. ISBN 978-0-387-09765-7

E. Argollo, A. Falcon, P. Faraboschi, and D. Ortega. "Toward the datacenter: scaling simulation up and out". In "Processor and System-on-chip simulation", R. Leupers and O. Temam (Eds). 1st edition 2010, Springer. ISBN 978-1-4419-6174-7

J. Fisher, P. Faraboschi, C. Young. "VLIW Processors: from Blue Sky to Best Buy". IEEE Solid State Circuit Magazine. Vol 1. N. 2, Spring 2009.

E. Argollo, A. Falcon, P. Faraboschi, M. Monchiero, and D. Ortega. "COTSon: Infrastructure for full system simulation". In ACM SIGOPS Operating System Reviews. January 2009 [also published as HP Labs Technical Report HPL-2008-189]

P. Faraboschi, J. Fisher, C. Young. Customizable Processors: Lofty Ambitions, Stark Realities. Chapter in “Customizable Embedded Processors”, P. Ienne and R. Leupers, Editors, Morgann-Kaufmann. San Mateo, CA. Jun 2006 (“Systems on Silicon” series)

G. Desoli, N. Mateev, E. Duesterwald, P. Faraboschi, J. Fisher. A new facility for dynamic control of program execution. Lecture Notes in Comp. Science, vol. 2491, pp 305-318, Oct 2002.

P. Faraboschi, J. Fisher, C. Young. Instruction Scheduling for Instruction Level Parallel Processors. Proceedings of The IEEE, Vol. 89, No. 11, November 2001.

P. Faraboschi, G. Desoli and J. Fisher. VLIW Architectures for DSP and Multimedia Applications, Cover article in special issue: The Latest Word in Multimedia, IEEE Signal Processing, 15(2):59-85, 3/1998.

Conferences

S. Li, K. Lim, P. Faraboschi, J. Chang, P. Ranganathan, and N. Jouppi. System-Level Integrated Server Architectures for Scale-Out Datacenters.In 44th Annual Intl. Symposium on Microarchitecture (MICRO44), Porto Alegre, Brazil Dec. 2011. IEEE/ACM

D.Lugones, D. Franco, D. Rexachs, JC Moure, E. Luque, E. Argollo, A. Falcon D. Ortega, P.Faraboschi , "High-speed network modeling for full system simulation," Workload Characterization, 2009. IISWC 2009. IEEE International Symposium on , vol., no., pp.24-33, 4-6 Oct. 2009

J. Mogul, E. Argollo, M.Shah, P.Faraboschi. Operating system support for NVM+DRAM hybrid main memory. In Hot Topics in Operating Systems (HotOS USENIX Workshop, May 2009, Mount Veritas, Switzerland)

P. Bryan, J. Beu, T. Conte, P. Faraboschi, D. Ortega. Our Many-core Benchmarks Do Not Use That Many Cores. In WDDD 2009. 8th Annual Workshop on Duplicating, Deconstructing, Debunking. Austin, TX. June 2009

M. Monchiero, J-H Ahn, A. Falcon, D. Ortega, and P. Faraboschi. How to Simulate 1,000 cores. In dasCMP’08: Workshop on Design, Architecture, and Simulation of Chip Multi-Processors, held in conjunction with MICRO-41. November 9, 2008, Lake Como, Italy [slides] (also published as HP Labs Technical Report HPL-2008-190)

A. Falcón, P. Faraboschi, and D. Ortega, "An Adaptive Synchronization Technique for Parallel Simulation of Networked Clusters", in 2008 International Symposium on Performance Analysis of Systems and Software, April 2008

A. Falcón, P. Faraboschi, D. Ortega. Combining Simulation and Virtualization through Dynamic Sampling. 2007 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2007). Apr 2007. San Jose, CA

S. Yacoub, J. Abad, P. Faraboschi, J., Burns, D. Ortega, V. Saxena. Document Digitization Lifecycle for Complex Magazine Collection.ACM Symposium on Document Engineering. Nov. 2005, Bristol, UK

S. Yacoub, J. Abad, P. Faraboschi, J., Burns, D. Ortega. Chronos: a System for Digitally Recapturing Content from Scanned Magazines. HP Labs Technical Report. HPL-2005-100

G. Desoli, N. Mateev, E. Duesterwald, P. Faraboschi, J. Fisher. DELI: a new runtime control point. In 35th Annual Intl. Symposium on Microarchitecture (MICRO35), Istanbul, Turkey, Nov. 2002. IEEE/ACM

P. Faraboschi and F. Homewood.ST200: A VLIW Architecture for Media-oriented applications Microprocessor Forum 2000. San Jose, CA, October 2000.

P. Faraboschi, J. Fisher, G. Brown, G. Desoli, F. Homewood. Lx: A Technology Platform for Customizable VLIW Embedded Processing. In 27th International Symposium on Computer Architecture (ISCA27), Vancouver, Canada, June 2000. IEEE/ACM

P. Faraboschi, G. Desoli, J. Fisher. Clustered Instruction-Level Parallel Processors. HPL Technical Report HPL-98-204. 1998

J. Fisher, P. Faraboschi, and G. Desoli. Custom-Fit Processors: Letting Applications Define Architectures. In 29th Annual Int. Symposium on Microarchitecture (MICRO29), Paris, France, 12/1996. IEEE/ACM.

A. De Gloria, P. Faraboschi, and M. Olivieri. An analysis of dynamic scheduling techniques for symbolic applications. In 26th Annual International Symposium on Microarchitecture (MICRO26), Austin, TX, 12/1993. IEEE/ACM.

A. De Gloria, P. Faraboschi, and M. Olivieri. A non-deterministic scheduler for a software pipelining compiler. In 25th Annual Int. Symposium on Microarchitecture (MICRO25), Portland, OR, November 1992. IEEE/ACM.

A. De Gloria, P. Faraboschi. Instruction-level Parallelism in Prolog: Analysis and Architectural Support. Gold Coast, In 19th International Symposium on Computer Architecture (ISCA19). Queensland, Australia. 1992. ACM/IEEE

A. De Gloria and P. Faraboschi. An evaluation system for application specific architectures. In Proc. 23rd Annual Int. Symposium on Microarchitecture (MICRO23), Orlando, FL, 11/1990. IEEE/ACM.