MPC 8245 PowerPC Processor
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Research Goal
- Development of a cost-efficient Layer 4 and Layer 7 Load Balancer (RoHS Compliant)
- Development of a switch system with 2 ports supplying 1G Interface
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Research Statistics
- Research resource: 2 people
- Research term: 2007.2 ~ 2007.10 (9 months)
- My role responsible of this research: 50%
- Research output: Schematics (Used PADS-Designer), Artwork (Used PowerPCB), CPLD Module system (Used HDSL Code)
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Techniques used for this research
- MPC8245: An intelligent system on a chip consisting of a high performance PowerPC CPU, a shared 32-Kb L1 cache, a SDRAM memory controller, and an integrated I/O. High-speed I/O is provided using a 32-bit PCI local bus.
- Restriction of Hazardous Substances Directive (RoHS): RoHS was adopted in February 2003 by the European Union. The RoHS directive took effect on 1 July 2006, and is required to be enforced and become law in each member state. This directive restricts the use of six hazardous materials in the manufacture of various types of electronic and electrical equipment.
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My contribution to the research
- System Archetecture: For contents processor module, I designed the system archetecture using Freescale MPC8245. Although it is hard to decide efficient topology of PCI devices, I solved the problem and made it stable system.
- System Initialization: Our platform consist of CPU, Memory(Flash, RAM), PCI-device, Watchdog-device, and 10/100/1000 Tranciever. As we needed to initialize whenever we wanted, I designed the initialization system used CPLD device which contolls all parts for initialization.
- Protolcols: Our system has used 1000/100/10 bps ethernet interface. Because they are the most important in our system, we should consider and confirm about the protocols to produce the constant output. I modified the signals which are important by parallel and serial termination.
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Results
Figure1: Artwork result based on MPC 8245
Figure2: Schematic result based on MPC 8245
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