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Refreed Journal / Conference / Workshop Papers- Compact Multi-dimensional Kernel Extraction for Register Tiling [Abstract]
Lakshminarayanan Renganarayana, Uday Bondhugula, Salem Derisavi, Alexander Eichenberger, and Kevin O'Brien
In SC'09: International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), November 2009 (to appear).
- Positivity, Posynomials and Tile Size Selection [Abstract] [PDF]
Lakshminarayanan Renganarayanan and Sanjay Rajopadhye
In SC'08: International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), November 2008. A Domain Specific Interconnect for Reconfigurable Computing [Abstract] [PDF]
Sanjay Rajopadhye, Gautam, Lakshminarayanan Renganarayana
In LCTES'08: ACM Conference on Languages, Compilers, and Tools for Embedded Systems, June 2008.
Computations on Iteration Spaces
Sanjay Rajopadhye, Lakshminarayanan Renganarayanan, Gautam Gupta, and Michelle Strout
In The Compiler Design Handbook: Optimization and Machine Code Generation, 2nd edition, 2008.
Multi-level tiling: m for the price of one [PDF]
DaeGon Kim, Lakshminarayanan Renganarayanan, Dave Rostron, Sanjay Rajopadhye, and Michelle Strout
In SC'07: International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), November 2007.
Parameterized Tiled Loops for Free [PDF]
Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay Rajopadhye, and Michelle Strout
In PLDI'07 : ACM SIGPLAN Conference on Programming Language Design and Implementation, June 2007
Towards Optimal Multi-level Tiling for Stencil Computations [PDF]
Lakshminarayanan Renganarayanan, Manjukumar Harthikote-Matha, Rinku Dewri, and Sanjay Rajopadhye
In IPDPS'07: IEEE International Parallel and Distributed Processing Symposium March 2007
Combined ILP and Register Tiling: Analytical Model and Optimization Framework [PDF]
Lakshminarayanan Renganarayanan, Ramkrishna Upadrasta and Sanjay Rajopadhye
In LCPC'05: International Workshop on Languages and Compilers for Parallel Computing, October 2005.
A Geometric Programming Framework for Optimal Multi-level Tiling [ Abstract ] [pdf]
Lakshminarayanan Renganarayana and Sanjay Rajopadhye
In SC'04: International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), Nov. 2004. Switched Memeory Architectures -- Moving beyond systolic arrays [ Abstract ] [pdf]
R. Lakshminaryanan and S. Rajopadhye
International conference on Application-specific Architectures, Systems and Processors (ASAP '03), June 2003.
On the use of Connector Libraries in Distributed Software Architectures [ACM DL link]
M Bharath Kumar, Y.N. Srikant, and R. Lakshminaryanan
ACM Software Engineering Notes, Volume 27, Number 1, January 2002.
Contextual Constraints -- Breaking the "to constrain or not to constrain" dilemma [gzipped postscript]
R Lakshminarayanan and Y.N. Srikant
International Computer Symposium, Dec 2000 (ICS2000).
A Study of Automatic Migration of Programs Across the Java Event Models [ACM DL link] [gzipped postscript]
M Bharath Kumar, R Lakshminarayanan and Y.N. Srikant
ACM Software Engineering Notes, Vol. 25, No. 3, May 2000, Pages 24-29.
Formalizing Control Architectures in AMS [gzipped postscript (56 Kb)]
R Lakshminarayanan and Y.N. Srikant
Second Nordic Workshop on Software Architecture, August 1999 (NOSA '99)
Thesis / Techinical ReportsScalable and Efficient Tools for Multi-level Tiling [PDF]
Lakshminarayanan Renganarayanan
Ph.D. Dissertation, Department of Computer Science, Colorado State University, February 2008
TriSL: A Software Architecture Description Language and Environment [gzipped postscript (296 Kb)]
R Lakshminarayanan
M.Sc.(Engg) dissertation, Department of Computer Science and Automation, Indian Institute of Science, May 1999
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