INTRODUCTION

Jian Li is a research staff member at the Novel Systems Architecture group at IBM Austin Research Laboratory.  He holds a Ph.D. degree in Electrical and Computer Engineering from Cornell University. 

He has worked in the areas of architectural support for power- and variation-aware computing, interconnection network design for high-performance computing systems, workload-driven three-dimensional (3D) integration architecture, architectural applications of non-volatile memory (NVM) and storage class memory (SCM), energy-efficient interconnection networks, data center networks, workload optimized systems and Big Data analytics, with a strong emphasis on entertaining his family members in Austin, Texas.  

He serves as an adjunct professor at the Texas A&M University and collaborates with Professor Lawrence Rauchwerger and other faculty. For details on his university collaborations, please check out the "University Collaborations" section of this page.

This web page is intended to record his professional effort in the public domain.

His web page at IBM Research website is here. This page was hosted at another IBM Research site prior to June 2010.

PUBLICATIONS 

• Chongmin Li, Haixia Wang, Yibo Xue, Dongsheng Wang (Tsinghua University), Jian Li, "Scalable Proximity-Aware Cache Replication in Chip Multiprocessors (short paper)", To appear in the Twentieth International Conference on Parallel Architectures and Compilation Techniques (PACT), Galveston Island, TX, October 10-14, 2011.
• TAPO: Thermal-Aware Power Optimization Techniques for Servers and Data Centers. Wei Huang, Malcolm Allen-Ware, John Carter, Elmootazbellah Elnozahy, Hendrik Hamann, Tom Keller, Charles Lefurgy, Jian Li, Karthick Rajamani and Juan Rubio, In the proceedings of International Green Computing Conference (IGCC), 2011 (Best Paper Award).

• Dan Zhao, Yi Wang, Jian Li and Takamaro Kikkawa, "Multi-Channel Wireless Network-on-Chip: A New Approach to Improving On-Chip Communication Capacity", International Symposium on Networks-on-Chip (NOCS), May 1-4, 2011.

• Jian Li, Wei Huang, Lixin Zhang, Charles Lefurgy, Wolfgang Denzel, Richard Treumann and Kun Wang, "Power Shifting in Thrifty Interconnection Networks", To appear in International Symposiun on High Performance Computer Architecture (HPCA), February 12-16, 2011.
• Hsiang-Yun Cheng, Jian Li, Chung-Hsiang Lin, Chia-Lin Yang and Ram Rajamony, "Memory Latency Reduction via Interference-Aware Task Throttling", To appear in the 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2010
• Baba Arimilli, Ravi Arimilli, Vicente Chung, Scott Clark, Wolfgang Denzel, Ben Drerup, Torsten Hoefler, Jody Joyner, Jerry Lewis, Jian Li, Nan Ni, Ram Rajamony, "The PERCS High-Performance Interconnect. " HotInterconnect (Hoti) '2010: Proceedings of the 18th Annual Symposium on High-Performance Interconnects.
• X. Wu, J. Li, L. Zhang, E. Speight, R. Rajamony and Y. Xie, “Design Exploration of Hybrid cache architecture with disparate memory technologies”, To appear in ACM Transaction on Architecture and Code Optimization (TACO), 2010.
• X. Wu, G. Sun, X. Dong, R. Das, J. Li, Y. Xie and C. Das, “Cost-driven 3D Integration with Interconnect Layers”, To appear in 47th Design Automation Conference (DAC), Anahelm, CA, June 13-18, 2010.
• H.-Y. Cheng, J. Li, C.-L. Yang, “An Analytical Model to Exploit Memory Task Scheduling”, To appear in INTERACT-14: Workshop on Interaction between Compilers and Computer Architecture and ACM DL, held in conjunction with ASPLOS 2010, March 13-17, Sheraton Station Square, Pittsburgh, PA, USA.
• W. E. Denzel, J. Li, P. Walker and Y. Jin, “A framework for end-to-end simulation of high-performance computing systems”, In Simulation: Transactions of the Society for Modeling and Simulation International, 2009. (Selected as one of the best conference papers at SimuTools 2008)
  
• J. Li, L. Zhang, C. Lefurgy, R. Treumann and W. Denzel. "Thrifty Interconnection Networks for HPC systems", poster abstract in the proceedings of International Conference on Supercomputing (ICS) 2009, Yorktown Heights, NY, June 8-12, 2009.
  
• X. Wu, J. Li, L. Zhang, E. Speight, R. Rajamony and Yuan Xie. "Hybrid cache architecture with disparate memory technologies", in Intl. Symp. on Computer Architecture (ISCA) 2009, Austin, TX, June 20-24, 2009. (Opening Session)
  
• X. Wu, J. Li, E. Speight, L. Zhang, and Yuan Xie. "Power-Performance evaluation of read-write aware hybrid caches", in Design, Automation & Test in Europe (DATE) 2009, Nice, France, April 20-24, 2009.
  
• G. Sun, X. Dong, Y. Xie, J. Li and Y. Chen, “A Novel Architecture of the 3D Stacked MRAM L2 Cache for CMPs”, In International Symposium on High-Performance Computer Architecture 2009 (HPCA) Raleigh, North Carolina- February 14-18, 2009. 
• X. Wu, J. Li, L. Zhang, E. Speight, and Yuan Xie. "Power and performance evaluation of 3D hybrid cache with non-volatile memory", HPCA 2009 3D Workshop, Raleigh, North Carolina, Feb. 14, 2009.
  
• J. Li and W. E. Denzel, “A framework for end-to-end simulation of high-performance computing systems and its application to PERCS design”, In IBM Academy of Technology - Performance Engineering 'Best Practice' Topical Conference, Southbury, CT, June 2008.
• W. E. Denzel, J. Li, P. Walker and Y. Jin, “A framework for end-to-end simulation of high-performance computing systems”, In Intl. Conf. on Simulation Tools and Techniques for Communications, Networks and Systems (SimuTools), Marseille, France, March 2008. (Opening Session)
  
• J. Li and J. F. Martínez, “Dynamic power-performance adaptation of parallel computation on chip multiprocessors”, In International Symposium on High Performance Computer Architecture (HPCA), Austin, TX, February 2006.
• J. Li and J. F. Martínez, “Power-performance considerations of parallel computing on chip multiprocessors”, ACM Transaction on Architecture and Code Optimization (TACO), December 2005.
• J. Li and J.F. Martínez, “Power-performance implications of thread-level parallelism on chip multiprocessors”, In International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX, March 2005. Earlier version appears in First Watson Conference on the Interaction between Architecture, Circuits, and Compilers (P = ac²), Yorktown Heights, NY, October 2004.
• J. Li, J.F. Martínez, and M.C. Huang, “The thrifty barrier: Energy-efficient synchronization in shared-memory multiprocessors”, In International Symposium on High Performance Computer Architecture (HPCA), Madrid, Spain, February 2004. (Opening Session)
  
• S. Lloyd, J. Li, J. Peckham, and Q. Yang, “Simultaneous database backup using TCP/IP and a specialized network interface card”, Book chapter in Advanced Topics in Database Research, Vol. 4, 2004.
• S. Lloyd, J. Peckham, J. Li, and Q. Yang, “RORIB – An economic and efficient solution for real-time online remote information backup”, Journal of Database Management (JDBM), 14 (3): 56-73, Jul. – September 2003

PROFESSIONAL ACTIVITIES

• Invited talk, Fudan University, Shanghai, 07/28/2011.
  
• PC member. IEEE International Parallel & Distributed Processing Symposium (IPDPS) (IPDPS), Shanghai, China, May 21-25, 2012.
• Invited talk, Tsinghua University, Beijing, China, 06/10/2011.
• Invited talk, Institute of Computing Technologies, Beijing, China, 06/14/2011.
• PC member. International Conference on Systems and Networks Communications (ICSNC), Barcelona, Spain, October 23-28, 2011.
• Co-organizer. Workshop on Architectures and Systems for Big Data (ASBD), held in conjunction with the The Twentieth International Conference on Parallel Architectures and Compilation Techniques (PACT-2011), Galveston, TX, October 11, 2011.
• PC member. IEEE International Conference of Soft Computing and Pattern Recognition (SoCPaR), Dalian, China, October 14-16, 2011.
• Finance Chair and PC member. IEEE International Symposium on Workload Characterization (IISWC), Austin, TX, October 23-25, 2011.
• Program Committee Co-Chair of Architecture Track. The IEEE International Conference on Networking, Architecture and Storage (NAS), Dalian, China, July 28-30, 2011.
• Invited talk, ECE, Texas A&M University, 04/15/2011.
• Invited talk, Institute of Computing Technologies, Chinese Academy of Sciences, 12/20/2010.
• Invited talk, IBM China Research Lab, 12/17/2010.
• Invited talk, Harbin Institute of Technology, 12/14/2010.
• Invited talk, The Center for Advanced Computer Studies (CACS), University of Louisiana at Lafayette, 11/19/2010.
• Invited talk, CSE, Texas A&M University, 10/20/2010.
• Industry Liason Co-chair. The 17th International Symposium on High Performance Computer Architecture (HPCA). San Antonio, Texas, February 12-16, 2011.
• Session Chair. The 2010 International Symposium on Low Power Electronics and Design (ISLPED). Austin, Texas, August 18-20, 2010.
• Co-organizer. The 2nd Workshop on Emerging Memory Technologies (WEMT). Held in conjunction with International Symposium on Computer Architecture 2010 (ISCA), Saint-Malo, France, June 19-23, 2010.
• Program committee member. The 5th IEEE International Conference on Networking, Architecture and Storage (NAS), the University of Macau, Macau SAR, China, July 15-17, 2010.
• Invited talk, ECE, Carnegie Mellon University, 01/26/2010.
• Invited talk, CSE, Penn State University, 01/25/2010.
• Program committee member. The IEEE Computer Society Annual Symposium On VLSI (ISVLSI), Lixouri Kafalonia, Greece, July 5-6, 2010.
• Host for Professor Hyesoon Kim, CoC, GaTech, 10/06/2009.
• Invited talk, CSE, Texas A&M University, 10/05/2009.
• Co-organizer and session chair, Workshop on Emerging Memory Technologies (WEMT).  Held in conjunction with International Symposium on Computer Architecture 2009 (ISCA), Austin, TX, June 20-24.
• Host of IBM ARL Technical Seminar for Professor Huiyang Zhou, ECE, NCSU, 06/23/2009.
• Host of IBM Research Arch PIC Seminar for Professor Onur Mutlu, ECE, CMU, 06/19/2009.
• Invited talk, Division of Engineering, Brown University, 06/11/2009.
• Invited talk, ECE, Texas A&M University, 03/10/2009.
• Host of IBM Research Arch PIC Seminar for Professor Mattan Erez, ECE, UT Austin, 02/13/2009. 
  
• Program committee member. Workshop on 3D Integration and Interconnect-Centric Architectures. Held in conjunction with International Symposium on High-Performance Computer Architecture 2009 (HPCA) Raleigh, North Carolina, February 14-18, 2009.
• Program committee member. The IEEE Computer Society Annual Symposium On VLSI (ISVLSI), Tampa, Florida, USA, on May 13-15, 2009.
• Host of IBM Research Arch PIC Seminar for Professor Yuan Xie, CSE, PSU, 09/26/2008.
  
• 3D tutorial, International Symposium on Computer Architecture (ISCA), Beijing, China, 06/212008. 
• Host of ARL Distinguished Seminar for Professor Narasimha Reddy, ECE, TAMU, 05/01/2008.
• Program committee member. International Conference on Networking, Architecture, and Storage (NAS), Chongqing, China. 06/2008.
• Program committee member. The 2008 International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN), Sydney, Australia. 05/2008. 

• yet more for Big Blue, July 2011.
  
• 2 more for Big Blue, Oct.-Nov. 2010.
  
• 5 more filed for Big Blue, May 2010.
• J. Li, L. Zhang, S. VanderWiel, "On-chip Networks for Flexible Three-Dimensional Chip Integration", United States Patent, file pending, October 2009.
  
• J. Li, R. Rajamony, W. Speight and L. Zhang, "Read and write aware cache", United States Patent, file pending, September 2009.
• J. Li, "Improved reconfigurable cache", United States Patent, file pending, June 2009.
  
• X. Wu, J. Li, R. Rajamony, W. Speight and L. Zhang, "Improvemed non-uniform cache architecture", United States Patent, file pending, November 2008.
  
• J. Li and L. Zhang, "Link services in a communication network", United States Patent, file pending, July 2008.
  
• Q. Yang and J. Li, "Remote online information backup system", United States Patent 7177887, February 2007.

University Collaborations

 I also serve as an adjunct professor at the Texas A&M University and collaborate with Professor Lawrence Rauchwerger and other faculty.