(1)   “Low Temperature Fusion Bonding of Silicon Wafers,” MINDEF-NTU Joint Applied R&D Co-operation Programme, JPP/07/02, S$50,000, July 2007 – June 2008, PI. (Completed)

(2)   “Multilayer Stacking of Silicon Thin Films,” Lee Kuan Yew Postdoctoral Fellowship, Nanyang Technological University, LKYPDF 01/07, S$99,592.10, July 2007 – March 2008, PI. (Completed)

(3)   “Development of Piezeoresistive Accelerometer on Integrated Microsystems Technology Platform,” Defence Innovative Research Program (DIRP), POD0613637 (DSTA-NTU-DIRP/2006/01), S$330,000, April 2008 – March 2010, co-PI. (On-going)

(4) "Three-Dimensional Integration – Performance Enhancement and Functional Diversification of CMOS," NTU Nanyang Assistant Professorship, S$999,700, September 2008 - August 2011, PI. (On-going)

(5) "Enabling Technology for Wafer Level 3-D ICs," MERLION 2008, ~ € 15,000, July 2008 - June 2010, PI. (On-going)

 (6) “Low Temperature Cu-Based Thermocompression Bonding for Advanced Integrated Systems Application,” SIMTech, S$80,000 (in-kind), October 2008 – September 2011, PI. (on-going)

(7) “On Wafer 3-D Integration by Means of Direct Bump-less Cu-Cu Bonding,” Semiconductor Research Corporation – Global Research Collaboration (SRC-GRC), USA, US$265,257, February 2009 – January 12, PI. (on-going)