3-D Integration Group at NTU
CHUAN SENG TAN
（陈全胜）
Nanyang Assistant Professor
E-mail: tancs@ntu.edu.sg
(updated: February 13, 2009)
NEWS and ANNOUNCEMENTS!
February 13, 2009: Proposal titled "Three-Dimensionally Stacked MEMS Realised with Low Temperture Cu-Cu Diffusion Bonding," will received funding from DARPA, USA.
January 15, 2009: Welcome new group members: Shiv Govind Singh (post-doc, working on 3D thermal issues), Peng Lan (PhD, working on3D) and Donny Lai (PhD, working on Si solar cells).
December 22, 2008: Proposal titled "On Wafer 3-D Integration by Means of Direct Bump-less Cu-Cu Wafer Bonding," was selected to receive funding from Semiconductor Research Corporation (SRC) in the US through it's Global Research Collaboration program. Glad to be affiliated with SRC once again!
October 8, 2008: Check out SolisTek's business idea of a solar powered laptop battery charger.
October 1, 2008: Proposal "Low Temperature Cu-Based Thermocompression Bonding for Advanced Integrated Systems Application," was approved by SIMTech.
August 4, 2008: Welcome to new PhD students in my group!
(1) Tan Yew Heng (Part Time PhD - Si/Ge Hetero-epitaxy);
(2) Chong Gang Yih (Part Time PhD - Low temperature wafer bonding);
(3) Lim Dau Fatt (Chartered Scholar - 3D Interconnects).
Please contact me if you are keen on PhD study in my group, 3 PhD Scholarships are available for grab. You can indicate your interest to work in my group in your graduate school application.
July 18, 2008: I will be teaching EE6601 Advanced Wafer Processing and EE2002 Analog Electronics in Semester 2.
July 2, 2008: My proposal titled "Enabling Technology for Wafer Level 3-D ICs" has been selected for the MERLION 2008.
June 25, 2008: I will assume academic appointment as a new Nanyang Assistant Professor in the Fall. Research opportunities are available at the level of Research Fellow (i.e. Post-doc) and Graduate Students (up to 3 PhD scholarships are available). If you are interested, please contact me directly.
Ph.D. in Electrical Engineering and Computer Science, Massachusetts Institute of Technology, USA (2006)
M.Eng. in Advanced Materials, Singapore-MIT Alliance, National University of Singapore, Singapore (2001)
B.Eng (Hons) in Electrical Engineering, University of Malaya, Malaysia (1999)
RESEARCH INTERESTS
My research interest covers the larger area semiconductor materials, structures, devices, and architecture. I am currently actively forming a group to take three-dimensional integrated circuits (3-D ICs) research to new heights. Briefly, I am looking at:
(1) 3-D interconnects (Block/Core level stacking) - This project explores enabling technology and process to enable vertical stacking of integrated circuits. This is for applications in high density stand-alone memory, embedded memory on logic, and multi-core. This entails chip-to-wafer and wafer-to-wafer bonding of Cu/Low-K hybrid at temperature < 200C. This project also covers formation of through layer via with a targeted density > 10e6 cm-2;
(2) Group-IV Heteroepitaxy and Heterostructure - I am particularly interested in direct buffer-less Ge growth on Si substrate for applications in CMOS, photonics, and solar cells (who can say no to SCs these days?). The epitaxy is performed in an Rapid Thermal Chemical Vapor Depostion (RTCVD) reactor from ASM (if you talk to ASM guys, they dislike the terms RTCVD, they prefer to call their tool "reduced pressure epitaxy"). I am also investigating the feasibility of wafer bonding for similar applications.
I undertake the above research in the Microfabrication Laboratory (MFL). Our group is funded generously by these agencies.
AWARDS AND SCHOLARSHIPS
Nanyang Assistant Professorship - Nanyang Technological University, Singapore (2008-2011)
Lee Kuan Yew Postdoctoral Fellowship – Lee Kuan Yew Endowment Fund, Singapore (2006-2008)
Applied Materials Graduate Fellowship - Applied Materials, USA (2003-2005)
Research Assistantship – Massachusetts Institute of Technology, USA (2001-2006)
Research Scholarship – Singapore-MIT Alliance, Singapore (1999-2001)
Book Prize – Department of Electrical Engineering, University of Malaya (1999)
Dean List – Faculty of Engineering, University of Malaya (1997, 1998, 1999)
The Lion-ASM Undergraduate Scholarship – The Lion Group, Malaysia (1996-1999)
Physics Prize – Malaysian Institute of Physics, Malaysia (1996)
Working Experience
Nanyang Technological University Singapore (08/2008-Present)
Assistant Professor - Supported by the Nanyang Assistant Professorship. Major research activities cover new integration concepts of group-IV based microelectronics. Activity in solar cells will also be initiated. Besides research, I also teach at undergraduate and graduate levels in analog electronics and advanced silicon processing.
Nanyang Technological University Singapore (09/2006-07/2008)
Research Fellow – Supported by the prestigious Lee Kuan Yew Postdoctoral Fellowship that includes stipend and research grant. Research on new concepts of semiconductor process integration such as three-dimensional integrated circuits (3-D ICs).
Intel Corporation Hillsboro, OR (06-08/2003)
Summer Intern - Investigated interconnect signal integrity at high frequencies, both measurement and modeling.
Microsystems Technology Laboratories, MIT Cambridge, MA (09/2001 – 03/2006)
Research Assistant – Developed fabrication technology for 3-D ICs using low temperature wafer bonding and thin films handling/transfer.
Institute of Microelectronics Singapore (03-08/2001)
Research Engineer – Responsible for process integration of strained-Si/relaxed-SiGe heterostructures.
Professional Body Affiliation
IEEE – Member
PROFESSIONAL ACTIVITIES
Reviewer for IEEE Electron Device Letters, Electrochemical and Solid-State Letters, Journal of the Electrochemical Society, IEEE Design and Test of Computer, Sensors and Materials