I am interested in problems connected to building tools that support programmers, implementing programming languages, and transforming and analyzing programs. Most recently, I have been focusing on the problem of engineering applications on parallel computing machines, and specifically FPGAs and systems containing FPGAs. I have initiated the Open Dataflow (OpenDF) project, which is a collaborative effort to create tools that map dataflow programs to FPGAs and multi-core processors. This work is open-sourced here.

A key element of this work is the synthesis of high-level algorithmic descriptions to FPGA configurations. A sophisticated backend infrastructure generating Verilog from an intermediate XML representation has been open-sourced under the name OpenForge. It constitutes the FPGA backend of the Open Dataflow tools.

The multi-core backend of the Open Dataflow work is being created by a group at Ericsson, also available in the OpenDF repository. They are working on this partly as members of the EU-funded ACTORS project, a collaboration led by Ericsson and involving a number of partners from academia and industry.

I have explored a number of application areas for this style of streaming/dataflow programming model. Obvious ones are any kind of media processing, networking, and DSP. After submitting our programming model and the related tools to MPEG's Reconfigurable Video Coding work group, they are now considering them for adoption as part of upcoming MPEG video standards (reference), using the CAL language as a medium for building future MPEG reference code.