I am working for Intel at Hillsboro, Oregon. Presently my project focus is on building up technology enabled CAD tools that will support the designs of future microprocessors and SoCs. I will also be working on density optimization to save on die area.

 I have experience working in Digital and Analog design, I/O development, design of test structures, low power and sub-threshold circuit design.

Work Experience

At The University of Texas at Austin (Aug. 2007 – Dec. 2007)

• Research with Prof. Jacob Abraham's group for developing Sub-threshold standard cell library.

At IBM India Software Labs, As R&D Engineer, Bangalore, India (April, 2006 – July, 2007)

• ASIC I/O library development in 65 nm CMOS technology with IBM Burlington team, USA.

• Worked on 45nm SOI MOSFETs technology with IBM Microelectronics group in Fishkill, USA for design of test structure macros to measure high-speed Pulse I-V Characteristics with only DC I/O's.

At Perot Systems TSI, as Associate, PeopleSoft Competency Bangalore (July, 2005 – April, 2006)

• Development of Automatic Car Reservation System in Java / J2EE.

Projects brief:
In India, I worked in the IBM India Software Labs, under their circuit design team. Just before quitting IBM, I was working in ASIC I/O develpoment with the pioneers of IBM's main chip development facility in Burlington, Vermont, US. I stayed for 3 months in Vermont, helping IBM, US team in I/O development. Before this project, I worked under the guidance of Dr. Manjul Bhushan and Dr. Mark B. Ketchan , Research Labs, IBM Fishkill,US. I was at Fishkill for a short term training. These people are pioneers in this field, Mark being an alumini of MIT, and working with them was quite a learning. The objective of the project I worked on was to design the layout and schematic for test structures in 45 nm 12S technology. Project also included the parameter extractions and optimization at interconnect level . After working with these learned people at IBM, I am inspired to do some advanced courses in MOSFETs and Si based device technologies. In Academics, I did some minor projects in FPGA using xilinx.