High Level Synthesis :
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“Compiling Multi-dimensional Data Streams into Distributed DSP ASIC Memory”, IEEE International Conference on Computer Aided Design, 1991
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“Just in Time Scheduling”, IEEE International Conference on Computer Design, 1992
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“Hardware/Software Co-Design of Digital Telecommunication Systems”, Proceedings of the IEEE, 1997 pdf-files
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“Synthesis of Pipelined DSP Accelerators with Dynamic Scheduling”, IEEE Transactions on VLSI, 1998
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“Hardware Reuse at the Behavioral Level”, Proceedings IEEE Design Automation Conference, 1999
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“A Methodology and Design Environment for DSP ASIC Fixed Point Refinement”, Proceeding of IEEE Design and Test in Europe, 1999
DSP :
Video :
Wireless :
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“A Programmable CDMA IF Transceiver ASIC for Wireless Communications”, IEEE Custom Integrated Circuit Conference, 1995
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“A 4*2.5Mchip/s Direct Sequence Spread Spectrum Receiver with Digital IF and Integrated ARM6 core”, IEEE Custom Integrated Circuit Conference, 1997
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“A Digital 80Mb/s OFDM Transceiver IC for Wireless LAN in the 5 GHz Band”, IEEE ISSCC 2000, pdf-files
System In Package :
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“A single package solution for wireless transceivers”, Proceedings IEEE Design and Test in Europe, 1999
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“A Chip-Package Co-Design of a Low-Power 5-GHz RF Front End”, Proceedings of the IEEE, 2000
Platforms
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