A tutorial on COTSon was held at MICRO-41 in Lake Como (Italy)

People

  • Theresa Frawley is a Senior Design Manager at AMD. She currently manages the SimNow and Architecture Extension teams, which support the new CPU and platform development activities at AMD.  Theresa started her first 11 years as an embedded software developer on military applications. First, she worked at McDonnell Douglas, writing software for the central computer on the F-15. Then, she worked on missile guidance systems that went on helicopters, at Emerson Electric. Next, she developed and managed small groups that worked on electronic warfare systems, at Magnavox. The last military application she was the lead developer for was a camera system, which went on fighter airplanes for Recon Optical. Before joining AMD in 2005, Theresa worked at Motorola for over 10 years managing and developing hardware and software development tools for embedded application developers, and was VP of Engineering for Obsidian Software, which makes a configurable random test generator used for microprocessor verification. Theresa received her BSEE from Michigan Technological University in 1980, and her MBA from St. Edward's University in 1998.
  • Vincent Lim is a Member of Technical Staff at AMD and developer for SimNow, primary focus on Analyzer and Monitor modules implementations and security algorithms. Prior joining AMD in 2003, he was the lead debugger engineer at Motorola on DSP StarCore processors. As development tools engineer, He has broad knowledge on design and implementation of assembler, compiler, debugger, disassembler, Simulator, and profiler tools. Vincent received his BSEE from Florida Atlantic University in 1994.
  • Ayose Falcón is a Research Scientist at HP Labs since 2004. His current research interests include simulation and virtualization technologies, disciplines in which he has published several papers and invention disclosures. Before joining HP, he was a research intern and consultant at Intel Microprocessor Research Labs, and a research and teaching assistant at the Universitat Politècnica de Catalunya (UPC). Ayose received his BS and MS degrees in Computer Science from the University of Las Palmas de Gran Canaria, and his PhD in Computer Science from UPC.
  • Paolo Faraboschi is a Distinguished Technologist at HP Labs, which he joined in 1994. His research interests skirt the boundary of hardware and software, including analysis of highly-parallel systems, VLIW architectures, compilers and embedded systems. Since 2003 he leads HP Lab’s Barcelona Research Office developing simulation and analysis techniques for the multi-core era. Previously, he was involved in the computing aspects of large content processing applications (“Time Archive” project) and on virtualization technologies for remote desktops. From 1997 to 2002, he was the technical leader of the “Custom-Fit Processor” Project at HP Labs Cambridge (MA) and the principal architect of the Lx/ST200 family of VLIW microprocessor cores. He received a PhD in EECS from the University of Genoa (Italy) in 1993. He is an active member of the computer architecture community, served in many top-tier conferences, including Program and General Chair for MICRO and CASES. He co-authored over 50 papers, 12 patents, and the book “Embedded Computing: a VLIW approach to architecture compiler and tools”.
  • Daniel Ortega is a Senior Research Scientist at HP Labs. He joined HP in 2003 after finishing his PhD in Computer Architecture at the Universitat Politècnica de Catalunya (UPC). His current research interests include simulation and programming languages. He has previous experience in content processing systems, dynamic optimization, and computer architecture. He is an active member of the Computer Architecture community.