HP Labs' COTSon simulator based on AMD's SimNow™ is a full system simulation infrastructure. It allows to simulate complete systems ranging from multicore nodes up to full clusters of multicore nodes with complete network simulation. It is composed of a pluggable architecture, in which most features can be substituted for your own development, thus allowing researchers to use it as their simulation platform.

"Oh no, not Yet Another Simulator..."

You are right, there are tons of simulators, why a new one? COTSon is not just another simulator, it is a simulation infrastructure where you can plugin your own simulation modules.

Our holistic approach simulates the whole system at once, because we believe that multicore multithreaded architectures of the future can not be understood without taking into account the whole system, including devices and the whole operating system. Something similar can be said about disk and network research.

As a design principle, COTSon trades off accuracy for speed and viceversa, dynamically allowing the researcher to determine the interesting parts of their application, as well as doing large space explorations at higher speeds. Why use many tools if one suffices?

We hope COTSon becomes the de facto standard simulation infrastructure for next generation systems simulation, and that is why we are making it freely available for academic research under request. So if you belong to any kind of research lab or university and you are interested in microarchitecture simulation, disk simulation, network simulation or system simulation, COTSon may be perfect for you.

Below are a series of examples of what can be easily done with COTSon. Do not hesitate to contact us for extra information if you need to.

One Node Examples

• COTSon easily allows to simulate one unique application, very much like SimpleScalar does
• ... but you can also simulate the whole Operating System for free, which means that all system calls and system interaction is taken into account (which is what we usually recommend, by the way)
  
• It supports simulating everything that runs on an AMD64 machine, which includes closed source binaries, such as Oracle, or even legacy 32bit applications
• If fully supports multicore systems with real OS scheduling, so there is no need anymore to invent (and subsequently try to justify) your own mechanism to schedule the traces of the SPEC benchmark suite, instead you get the scheduling a real system would produce
• It allows to simulate multithreaded applications
• It enables you to change the CPU timing models, or just reprogram parts of it, such as the branch predictor or the issue mechanism
• COTSon has a comprehensive memory hierarchy design, where you can select among many different bus coherence and cache options, or even reprogram any part of it. It supports an unbounded hierarchy of cache levels
  
• COTSon allows different sampling strategies to be used, and it also allows the user to program new sampling mechanisms into COTSon
• COTSon allows you to change the disk models and experience the impact on the whole system
• COTSon enables the researcher to completely design their new hardware (such as PCI or hypertransport devices) and fully simulate (including power and performance characteristics) under one unique infrastructure
  

We recorded the whole MICRO-41 tutorial and is now available for viewing from Youtube. We had to chop it down into 21 parts. You can see the whole list of videos in our Videos page.