hasannayfeh

Hasan M. Nayfeh, Ph.D.

IBM Semiconductor R&D Center

Dr. Nayfeh is a Senior Engineer at the IBM Semiconductor R&D Center (East Fishkill, New York). He has worked on SOI device design that resulted in the successful deployment of 65 & 45nm nodes. He is working currently on technology definition for the 22nm node. He received his Ph.D. in 2003 in Electrical Engineering from MIT (Cambridge, Massachusetts) in the area of strained-silicon/SiGe devices. He has over 30 technical publications and 4 patents and is a senior member of the IEEE.

Publications

Press Coverage

Talks

Awards

Patents

Professional Activities

Collaboration

Research & Development Interests

Electron & hole transport of nanoscale CMOS devices
CMOS device design and process integration for sub-45nm technologies.
Analytical physical modeling of high performance electronic devices (electrostatics & transport).
Low power electronic device design for mobile applications.
Novel materials with enhanced transport properties over Si (SiGe III-V compound semiconductors, Carbon (Graphene, CNTs, etc.). Wide-band gap materials for power electronic devices.
Replacement paradigms for classical CMOS devices (spin-based transistors for 'quantum' computing for example).

Hasan Nayfeh

LINKS

Publications

Press Coverage

Talks

Awards

Patents

Professional Activities

Collaboration

Research & Development Interests

Electron & hole transport of nanoscale CMOS devices

CMOS device design and process integration for sub-45nm technologies.

Low power electronic device design for mobile applications.

Novel materials with enhanced transport properties over Si (SiGe III-V compound semiconductors, Carbon (Graphene, CNTs, etc.). Wide-band gap materials for power electronic devices.