About Dr Fawnizu

Other details about Dr Fawnizu can also be found at his LinkedIn profile.

Dr Fawnizu Azmadi Hussin

Senior Lecturer at Universiti Teknologi Petronas, Malaysia

E-mail: fawnizu at petronas.com.my
E-mail: fawnizu at ieee.org


Office:
22-03-10
Address: Universiti Teknologi Petronas, Bandar Seri Iskandar, 31750 Tronoh, Perak, Malaysia
Phone (D/L): +605-368-7811
Fax (Dept.): +605-365-7443

Latest fiction book read:  Deadwater Deep by Terence Strong
Current reading:   The Lost Symbol by Dan Brown
Fiction books I like:
Deception Point, Digital Fortress, Da Vinci Code, Angels & Demons by Dan Brown. Map of Bones by James Rollins.
Latest non-fiction book read: The Millionaire in Me by Azizi Ali

Dr Fawnizu Azmadi Hussin is currently a Senior Lecturer/Researcher at the Electrical & Electronics Engineering Department, Universiti Teknologi Petronas, Malaysia. He is a member of the Pervasive Systems research cluster. On the administrative side, Dr Fawnizu is the Program Manager of the MSc in Electronics System Engineering, a coursework-based Master program offered by the Electrical & Electronics Engineering Department at UTP.

Dr Fawnizu received the Bachelor of Electrical Engineering degree with emphasis in the field of Computer Design from the University of Minnesota, Twin Cities in 1999. Upon completion, he returned to Malaysia to join the Universiti Teknologi Petronas as a tutor.

Early in 2000, he continued his study at the University of New South Wales, Australia and obtained the Masters of Engineering Science in Electrical Engineering in 2001 with a project thesis entitled "Drum Water Level Control: A Study by Simulation".

He returned to Universiti Teknologi Petronas to join as an academic staff where he pursued his interest in academic and research until the end of March 2005. Starting April 2005, Dr Fawnizu continued his research as a PhD student at the Nara Institute of Science and Technology, Japan. He was awarded the Monbukagakusho scholarship for the duration of his PhD research by the Ministry of Education, Culture, Sports, Science and Technology (MEXT) of Japan.

At Nara Institute, he completed his PhD atthe Computer Design & Test Laboratory (Fujiwara Laboratory). His PhD thesis is in the field of System-on-Chip and Network-on-Chip Testing under the supervision of Professor Hideo Fujiwara and Assistant Professor Tomokazu Yoneda. He has published several research papers as a result of his research at the laboratory.

Dr Fawnizu is interested in all aspects of VLSI design and testing, specifically in the following areas:
  1. Design-for-Test for System-on-Chip
  2. Delay test of multi-voltage systems
  3. Low-power and area efficient scan DFT architecture
  4. SOC test scheduling algorithms
  5. Network-on-Chip interconnect technology
  6. Low-power VLSI design targeting embedded applications
  7. Algorithm and architecture implementation and optimization on FPGAs
A list of Dr Fawnizu's paper publications can be found here.