Distinguished Member of the Wireless Technical Staff, 1994-2007

2006-2007: Freescale representative and contributor to the 3GPP Radio Access Network (RAN1 and RAN4) standards body for development of next generation HSPA and LTE cellular standards (traveled to world-wide meetings in Shanghai, Tallin, Riga, & St. Louis).…………………………………………….-…………………………………………...
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2005-2007: Freescale Senior Technical leader in the development of  end-to-end system level radio link level and system level simulators using Matlab classes and object oriented programming for 3GPP Long Term Evolution (4G LTE), High Speed Packet Access (3.5G). Systems including both uplink LTE/HSPA and downlink. The next generation 3GPP standards for 3.5GHSPA/4GLTE were developed and simulated at the radio link level air interface.
 

2004-2005: Motorola Technical leader prototype development of a communication signal processor (CSP) for single antenna interference cancellation and Edge. This state of the art technology enables parallel processing of 5 simultaneous linear equations via highly accelerated O(N^3) Cholesky decomposition techniques using application specific, time stationary DSP parallel processor, and custom assembler optimized for parallel processing of matrices.

2001-2004: Motorola 802.11 WLAN PROGECT LEADER: 2001-2004
Manager, modem architect of the IEEE 802.11 WLAN Chipset Project digital baseband physical layer IC.  Lead an advanced development team of RF and digital communications engineers developing an integrated chipset specification targeted at 802.11b Complementary Code Keying (CCK), 802.11b DSSS and 802.11a Orthogonal Division Frequency Multiplexing (OFDM).