Group Members

Faculty]

Yan Solihin is an Associate Professor at the Department of Electrical and Computer Engineering at North Carolina State University. He obtained his B.S. degree in computer science from Institut Teknologi Bandung in 1995, B.S. degree in Mathematics from Universitas Terbuka Indonesia in 1995, M.A.Sc degree in computer engineering from Nanyang Technological University in 1997, and M.S. and Ph.D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1999 and 2002. He is a recipient of 2010 and 2005 IBM Faculty Partnership Award, 2004 NSF Faculty Early Career Award, and 1997 AT&T Leadership Award. He is a senior member of the IEEE, and a member of ACM and ACM SIGMICRO.

His research interests include parallel computer architecture and parallel programming, design and modeling of memory hierarchy of multicore processors, and architecture support for security and software reliability. He has published more than 40 papers in computer architecture and performance modeling. He has released several software packages to the public: ACAPP - a cache performance model toolset, HeapServer - a secure heap management library, Scaltool - parallel program scalability pinpointer, and Fodex - a forensic document examination toolset. He has written a graduate-level textbook titled Fundamentals of Parallel Computer Architecture: Multichip and Multicore Systems.

At North Carolina State University, he founded and leads the Architecture Research for Performance, Reliability, and Security (ARPERS) group. As of January 2011, ARPERS has graduated 7 PhD students and 8 Master's degree students, and currently has 6 PhD students.

PhD Pipeline

Modern processors exploit instruction pipelining and instruction-level parallelism. It is only natural that similar techniques are applied for the PhD study pipeline. Student pipelining breaks the study into several pipeline stages, while student-level parallelism allows multiple students to be at the same stage at the same time. Despite the trends in hyper-pipelining to achieve a very high clock frequency, we choose not to employ hyper-pipelining so that each stage corresponds to a tangible milestone.

Fetch	Dispatch (starting to investigate a topic)	Issue (Passed Qualifiers)	Execute (Passed Prelims)	Retire (Graduated)
				Mazen (Dec 2005)
				Seongbeom (Mar 2007)
				Fei Guo (Aug 2008)
				Brian (Oct 2009)
				Xiaowei (Dec 2009)
				Siddhartha (Nov 2010)
				Fang (Mar 2011)
			Anil (May 2011)
			Devesh (Feb 2012)
			Ahmad (Feb 2012)
			Ganesh (Apr 2012)
Amro (Jan 2012)
Future Students

Current Group Members

	Devesh Tiwari Devesh's search for the perfect helper thread is over now (May 2011), and this helper thread prefers to be called companion thread. Thanks to this critical thread for pointing out the perfect companion thread. Now, Devesh is learning to predict performance (behavior) of this companion thread with respect to different inputs (conditions). MapReduce performance model is a bit of help in real life as well! Old stuff: Devesh misses his credit card deadlines, rent payments, bill payments because he wants to speed up sequential applications. His idea for speeding up sequential applications is offloading non-critical tasks to helper threads, he thinks he is smart and applies the same concept in real life by offloading rent and bill payments to others, turns out such non-critical tasks become really critical after his "helper threads" also fail to execute offloaded tasks in time. More importantly, such bad synchronization also makes Devesh miss his critical task such as credit-card payment. Nevertheless, Devesh has been learning from his real life to improve his academic research. On a serious note, Devesh finished his Bachelors from India in Spring 2007, entered PhD program at NC State in Fall 2007 and passed his PhD qualifier exam in Spring 2009, and PhD preliminary exam in Spring 2012. Home Page: http://www4.ncsu.edu/~dtiwari2 redirected to http://sites.google.com/site/deveshdtiwari/
	Anil Krishna Anil Krishna is a PhD student, primarily advised by Dr. Yan Solihin. He joined NCSU in Fall 2005, and holds a Masters in ECE from Purdue University (2001) and a Bachelors from the Indian Institute of Technology, Guwahati, India(1999). His research interests are in identifying bottlenecks in Chip Multi Processor scaling and developing analytical models to gain better understanding of the interplay between various factors which determine such scaling. Anil is an Advisory Engineer at the System Architecture and Performance Group at IBM, in Research Triangle Park, North Carolina. In his free time Anil enjoys photography, blogging, pencil (and iPhone) sketching, running, and thinking about philosophy.
	Ahmad Samih "Impossible is just a big word thrown around by small men who find it easier to live the world they've been given than to explore the power they have to change it. Impossible is not a fact. It's an opinion. Impossible is not a declaration. It's a dare. Impossible is potential. Impossible is temporary. Impossible is nothing." "Your ship doesn't always come in.... Sometimes you have to swim out to it."
	Ganesh Balakrishnan Ganesh is a hardware engineer at IBM's System X and BladeCenter performance group. He has been with IBM since 2001 and his responsibilites include processor/memory subsystem and networking performance. He has authored a number of technology whitepapers and has close ties with IBM's intellectual property process. He has also filed a number of patents related to networking and performance. He completed his MS in 2001 from Purdue University and has been pursuing his PhD since the spring of 2009.
	Future Students