Digital Systems Test & Testable Design (Spring 2009) Class meeting time: Mondays and Wednesdays 5:00 - 6:15 Class location: MEC 206 Syllabus See attachment below. Textbook Niraj Jha and Sandeep Gupta, Testing of Digital Systems, Cambridge University Press, 2003, ISBN 0-521-77356-3. Homeworks Homework #1: 3.6 (do 4-input version instead of 8-input), 3.7, 3.8, 3.11 Homework #2: 4.3, 4.4, 4.26a Homework #3: first half of 5.5, 5.6 Homework #4: review and presentation of paper of your choosing Projects See attachments below for Project #1, #2, and #3 assignments. Schedule Date day Material Covered in Class 1/21 W Introduction (Chapter 1)
1/28 W Fault simulation (Chapter 3) 2/2 M Fault simulation (Chapter 3) 2/4 W Fault simulation (Chapter 3) HW #1 Due 2/9 M Combinational test generation (Chapter 4) 2/11 W Combinational test generation (Chapter 4) 2/16 M Holiday 2/18 W Combinational test generation (Chapter 4) HW #2 Due 2/25 M Combinational test generation (Chapter 4) 2/27 W Exam #1 (Chapters 1-4) 3/2 M Sequential test generation (Chapter 5) 3/4 W Sequential test generation (Chapter 5) 3/9 M Sequential test generation (Chapter 5) Proj #1 Due 3/11 W Sequential test generation (Chapter 5) 3/16 M IDDQ testing (Chapter 6) 3/18 W IDDQ testing (Chapter 6) HW #3 Due 3/23 M Holiday 3/25 W Holiday 3/30 M Delay fault testing (Chapter 8) 4/1 W Delay fault testing (Chapter 8) 4/6 M Exam #2 (Chapters 5-6 and 8) 4/8 W Design for test (Chapter 11) Proj #2 Due 4/13 M Design for test (Chapter 11) 4/15 W Design for test (Chapter 11) 4/20 M Built-in self-test (Chapter 12) 4/22 W Built-in self-test (Chapter 12)
4/27 M Built-in self-test (Chapter 12) 4/29 W Exam #3 (Chapters 11 and 12) 5/4 M Presentations (HW #4) 5/6 W Presentations (HW #4) Proj #3 Due |
ECE631 |