Overview
- Functions are parameterized expressions.
- Functions are a way to encapsulate a description.
- Functions are first class objects and can be passed to other functions or modules.
- Functions are defined once and can be instantiated many times.
- Functions return an object.
- Functions can be used for both static elaboration and to describe combinational circuits.
- Functions can be an abstraction of a combinational expression where the arguments are the inputs to the circuit and the result is the output of the circuit.
- When used for static elaboration function arguments and results can have any type, not just restricted types as in Verilog or SystemVerilog. Types can include rules, interfaces, modules and functions.
Syntax
function type function_name (arguments) provisos; function body statements; return statement;endfunction: function_nameExamples
The boolean negation function:
function Bool notFn (Bool x); if (x) notFn = False; else notFn = True; endfunction: notFnThe boolean negation function, but using return instead:
function Bool notFn (Bool x);
if (x) return False;
else return True; endfunction: notFnThe factorial function, using a loop:
function int factorial (int n); int f = 1, j = 0; while (j < n) begin f = f * j; j = j + 1; end factorial = f; endfunction: factorialThe factorial function, using recursion:
